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Reliability Screening via Outlier Analysis

Reliability Screening via Outlier Analysis
通过异常值分析进行可靠性筛选
批准号:
0306572
负责人:
Duncan Walker
金额:
$23.0万
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
2003
资助国家:
美国
项目状态:
已结题
起止时间:
2003-09-01 至 2007-08-31

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中文摘要
翻译
在高温和高压下测试集成电路芯片,即所谓的老化测试,是为了提高产品的可靠性,方法是筛选出通过所有常规测试,但在客户使用过程中可能失败的芯片。微处理器等高性能芯片的老化需要越来越昂贵的功率和温度控制,以避免损坏好的芯片。老化测试在新技术中也变得不那么有效。这些问题的结合意味着,老化测试现在的成本可能高于高性能产品的常规芯片测试。老化测试对于许多产品来说已经太昂贵了,尽管它们对可靠性有很高的要求。在不老化的情况下提高芯片可靠性的一种方法是丢弃与其他芯片“不同”的芯片。它们的不同之处在于它们工作正常,但一些测量结果有异常值。这些“害群之马”的筹码被统计学家称为“异常值”。让这个问题具有挑战性的是,过去的经验表明,大多数被丢弃的筹码对客户来说都能很好地工作。因此,扔掉它们代表着制造商的利润损失。研究的目标是找到更准确地识别客户可能失败的离群值的技术。有两个研究挑战。第一种方法是确定一组擅长检测异常值的测量方法。第二个是确定什么时候测量异常,芯片应该被扔掉。从历史上看,芯片消耗的待机功率在检测异常值方面效果很好。然而,在新技术中,这一点正变得不那么严重。新的想法是考虑其他测量,比如在异常低的工作电压下的行为,或者芯片与半导体晶片上的邻居有多大的不同。这项研究将使用IBM、LSI Logic和德州仪器的芯片数据来评估这些和其他想法,以确定在实践中效果良好的方法。这项研究的主要优点是,它将开发出降低芯片制造成本的技术,并提高运往客户的芯片的可靠性。
英文摘要
Testing integrated circuit chips at elevated temperature and voltage,known as burn-in testing, is used to improve product reliability byscreening out chips that pass all their regular tests, but might failduring customer use. Burn-in of high performance chips such asmicroprocessors requires increasingly expensive power and temperaturecontrol to avoid destroying good chips. Burn-in test is also becomingless effective in newer technologies. The combination of theseproblems means that burn-in test can now cost more than regular chiptesting for high-performance products. Burn-in test is already tooexpensive for many products, even though they have high reliabilityrequirements.One way to improve chip reliability without burn-in is to throw awaychips which are "different" from the rest of the chips. They aredifferent in that they work correctly, but some measurements haveabnormal values. These "black sheep" chips are known to statisticiansas "outliers". What makes this problem challenging is that pastexperience shows that most of the chips thrown away will work justfine for the customer. So throwing them away represents lost profitsto the manufacturer. The research goal is to find techniques that moreaccurately identify outliers that would fail for the customer.There are two research challenges. The first is to identify a set ofmeasurements that are good at detecting outliers. The second is todetermine when a measurement is so abnormal that a chip should bethrown away. Historically the standby power consumed by a chip hasworked well for detecting outliers. However this is becoming less soin new technologies. New ideas are to consider other measurements,such as behavior under abnormally low operating voltages, or howdifferent a chip is from its neighbors on the semiconductorwafer. This research will evaluate these and other ideas using chipdata from IBM, LSI Logic and Texas Instruments to identify approachesthat work well in practice. The primary merit of the research is thatit will develop techniques to reduce chip manufacturing costs andimprove the reliability of chips shipped to customers.
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会议论文
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  • 项目类别:
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  • 资助金额:
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  • 批准年份:
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