SGER: Bridging Nanoelectronics to CMOS

随着CMOS的缩放接近尾声，一种能够将器件集成推进到更高密度的器件范式变得势在必行。业界面临的最大挑战是CMOS的功率密度。这可以从ic消耗的总功率的快速增加中看出，甚至更不祥的是单位面积的功率。在器件方面继续取得进展的一个有吸引力的途径是开发一种范例，其中所需的能量比CMOS中的能量低几个数量级。一种被称为量子点细胞自动机（QCA）的纳米电子学范式具有这种前景，通过使用准绝热时钟，开关能量可以低于kT。此外，时钟QCA单元可以为逻辑电平恢复提供真正的功率增益。虽然纳米电子学可能是未来电子学的关键技术，但应该认识到，在缩放结束后很长一段时间内，CMOS将在系统中占有一席之地，并且纳米电子学的实现必然需要与CMOS接口。CMOS具有许多可以利用的优势，并且应该利用广泛的CMOS基础设施来实现向纳米电子范式的平稳过渡。例如，时钟和与外界的接口将由CMOS电路处理，而计算任务将由低功耗纳米电子电路处理。纳米电子学与CMOS的结合将是实现电子系统的一种极好的方式。提出的项目将探讨纳米电子学和CMOS的接口问题。

As the scaling of CMOS nears its end it becomes imperative to a device paradigm that can carry forward device integration to ever-higher densities. The most daunting challenge facing the industry in the scaling of CMOS is power density. This is seen in the rapid increase in the total power dissipated by ICs, and even more ominously in the power per unit area. An attractive route to continue progress in devices is to develop a paradigm where the energy required is orders of magnitude lower than that possible in CMOS. A nanoelectronics paradigm called quantum-dot cellular automata (QCA) holds this promise, where by using quasi-adiabatic clocking the switching energy can be below kT. In addition clocked QCA cells can provide true power gain for logic level restoration. While nanoelectronics is perhaps the key technology for the future of electronics, it should be recognized that CMOS will have a place in systems long after the end of scaling, and implementations of nanoelectronics will necessarily need to interface with CMOS. CMOS has a tremendous number of advantages which can exploited, and the extensive CMOS infrastructure should be leveraged to make the smoothest possible transition to the nanoelectronic paradigm. For example, clocking and interfacing to the outside world would be handled by CMOS circuitry, while computation tasks would be handled by the low-power nanoelectronic circuitry. Combinations of nanoelectronics and CMOS will be an excellent way to implement electronic systems. The proposed project will explore the issues of interfacing nanoelectronics and CMOS.