Adiabatic Systems for Low Power Computation
用于低功耗计算的绝热系统
基本信息
- 批准号:1914061
- 负责人:
- 金额:$ 45万
- 依托单位:
- 依托单位国家:美国
- 项目类别:Standard Grant
- 财政年份:2019
- 资助国家:美国
- 起止时间:2019-07-01 至 2024-06-30
- 项目状态:已结题
- 来源:
- 关键词:
项目摘要
The greatest challenge facing the integrated circuit industry is power dissipation, a problem understood by anyone using a laptop computer. Today's microprocessors can dissipate more than ten times the power density of an electric stove-top element. The underlying cause of this dissipation is the wasteful way in which information is handled in modern microprocessors. This project will investigate structures to improve two crucial parts of a computational system. In the first, devices will be developed for adiabatic reversible logic, using an approach that eliminates leakage power dissipation in digital logic. In this type of logic the energy used in the computation can be recovered and reused, instead of being lost to heat as in today's computers. However, in practice this recovery of energy is difficult to do in real systems. To address this, in the second thrust, power resonators will be developed that can efficiently recover and recycle the energy that is used to process information within the logic. Resonators coupled with reversible adiabatic capacitive logic can greatly reduce the power consumption of computing systems and increase the amount of computation that can be accomplished in an energy constrained application such as the internet of things (IoT). The outreach program proposed will target middle school and high school students through classroom activities involving faculty and graduate students, and field trips to bring students to the Notre Dame labs.Power dissipation continues to be an immense challenge facing the integrated circuit industry, as today's microprocessors can dissipate more than 100 W/cm2, stretching the limits of single-chip cooling. The underlying cause of this dissipation is the wasteful way in which information is processed in modern processors. In conventional logic the energy used to encode a bit of information is dissipated to heat in each clock cycle. Adiabatic reversible logic can be used to lower dissipation by recovering and reusing the bit energies, but this approach is limited by the energy lost to leakage in the devices. In addition, energy recovery is complicated and often inefficient. The goal of this project is to develop micro-electromechanical systems (MEMS) structures for both crucial parts of a reversible computational system: logic and energy recovery. Reversible logic based on transistors is limited by the leakage through the transistors, but the MEMS-based adiabatic capacitive logic developed in this project eliminates leakage. The project will leverage work on devices such as nanorelays to produce voltage-controlled capacitors used in logic structures, and since current-carrying electrical contacts are not required, a key limitation of nanorelays is eliminated. Relatively little research has been done on power supplies that can drive the logic circuit then recover and reuse the energy used in the computation. Resonant circuits can meet these requirements, and this project will investigate MEMS resonators that operate with better efficiencies than are possible with on-chip inductor-based resonators. As a critical component for energy recovery, these resonators must have characteristics different that those of typical MEMS resonators, which are used mostly as time-bases for clocking, and for frequency filtering. The piezoelectric contour mode resonators developed here will deliver, and recover, significant energy into a capacitive load (the logic elements) with low internal dissipation. Resonators coupled with reversible adiabatic capacitive logic implement an overall system that can greatly improve the amount of computation that can be done in an energy constrained application such as IoT.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
集成电路行业面临的最大挑战是功耗,这是任何使用笔记本电脑的人都能理解的问题。 今天的微处理器所消耗的功率密度是电炉顶部元件的十倍以上。 这种浪费的根本原因是现代微处理器处理信息的浪费方式。 这个项目将研究结构,以改善计算系统的两个关键部分。 在第一,设备将开发绝热可逆逻辑,使用的方法,消除泄漏功耗的数字逻辑。 在这种类型的逻辑中,计算中使用的能量可以被回收和重新使用,而不是像今天的计算机那样被浪费在热量上。 然而,在实践中,这种能量回收在真实的系统中是难以进行的。 为了解决这个问题,在第二次推进中,将开发功率谐振器,可以有效地回收和循环用于处理逻辑内信息的能量。与可逆绝热电容逻辑耦合的谐振器可以极大地降低计算系统的功耗,并且增加可以在诸如物联网(IoT)之类的能量受限应用中完成的计算量。该推广计划将通过教师和研究生参与的课堂活动以及实地考察将学生带到Notre Dame实验室来针对初中和高中学生。功耗仍然是集成电路行业面临的巨大挑战,因为今天的微处理器可以消耗超过100 W/cm 2,扩展了单芯片冷却的极限。 这种耗散的根本原因是现代处理器处理信息的浪费方式。 在传统逻辑中,用于编码一位信息的能量在每个时钟周期中被耗散为热量。 绝热可逆逻辑可以通过回收和再利用比特能量来降低功耗,但这种方法受到器件中泄漏损失的能量的限制。 此外,能量回收是复杂的,而且往往效率低下。 该项目的目标是为可逆计算系统的两个关键部分开发微机电系统(MEMS)结构:逻辑和能量回收。 基于晶体管的可逆逻辑受到晶体管泄漏的限制,但本项目开发的基于MEMS的绝热电容逻辑消除了泄漏。该项目将利用纳米继电器等器件的工作来生产用于逻辑结构的压控电容器,由于不需要载流电触点,因此消除了纳米继电器的一个关键限制。 相对较少的研究已经做了电源,可以驱动逻辑电路,然后回收和再利用的能量在计算中使用。 谐振电路可以满足这些要求,本项目将研究MEMS谐振器,其工作效率比片上电感谐振器更高。 作为能量恢复的关键部件,这些谐振器必须具有与典型MEMS谐振器不同的特性,典型MEMS谐振器主要用作时钟和频率滤波的时基。 这里开发的压电轮廓模式谐振器将提供,并恢复,大量的能量到一个电容性负载(逻辑元件)与低内部耗散。 谐振器与可逆绝热电容逻辑相结合,实现了一个整体系统,可以大大提高物联网等能源受限应用的计算量。该奖项反映了NSF的法定使命,并通过使用基金会的知识价值和更广泛的影响审查标准进行评估,被认为值得支持。
项目成果
期刊论文数量(1)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
Measurements of variable capacitance using single port radio frequency reflectometry
使用单端口射频反射计测量可变电容
- DOI:10.1063/5.0146064
- 发表时间:2023
- 期刊:
- 影响因子:1.6
- 作者:Celis-Cordova, Rene;Gose, Jacob J.;Brown, Abigail F.;Behn, AnnahMarie G.;Huebner, Matthew;Williams, Ethan M.;Xiang, Yang;Chisum, Jonathan D.;Orlov, Alexei O.;Snider, Gregory L.
- 通讯作者:Snider, Gregory L.
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Gregory Snider其他文献
Gregory Snider的其他文献
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