A New-Class of Molecularly-Engineered Nanoporous Dielectric Materials for Insulation in Device Wiring for Integrated Circuits

该项目旨在开发一种独特的纳米多孔低介电常数Si-C-H-O介电材料，具有内置的热化学和机械稳定性，并使其能够与集成电路中的铜线集成，而无需使用单独的接口层。铜在相邻绝缘介质材料中的快速扩散和铜-电介质界面粘附性差是电子线路中器件布线的主要问题。通常，使用10-20 nm厚的过渡金属基界面势垒层来绕过该问题。如此厚的势垒层不能用于50纳米以下的器件，因为它们减少了低阻铜的空间，并抵消了铜线的主要优势。这些材料所需的超薄(例如，3 nm)势垒不容易通过传统方法沉积，特别是在多层布线中常见的高深宽长宽比特征的共形涂层。智能优点：自组装分子纳米层(SAM)提供了克服传统势垒缺点的潜力，同时增强了铜-电介质界面的化学和机械完整性。该项目致力于在合成过程中将低极化率有机硅烷自组装膜集成到多孔介质中，并加深对电和机械性能以及化学和热稳定性的了解，从而使这种材料能够与铜直接集成。该方法包括(A)在外表面和内表面加入抑制化学攻击的部分，以及(B)分子桥和有序孔，以机械地增强多孔介质。具体目标是：(1)通过在二氧化硅基多孔介质中掺入孔钝化和增粘分子部分来合成无障碍电介质；(2)通过创建有序孔来机械增强多孔介质，并通过交联型低极化率有机硅烷来实现孔壁的分子桥接；(3)表征上述策略对介电性能、热稳定性和化学稳定性、抗铜扩散的弹性以及铜-介质界面粘附性的影响；以及(4)了解并优化分子末端、链长、孔内分子交联度以及工艺参数对性能的影响。为了达到上述目的，将具有铜固定、疏水或可交联端的有机硅烷引入到用于溶胶-凝胶合成多孔二氧化硅的胶束模板中，并在凝胶和后处理过程中与介电材料结合。工艺-结构-化学-性能的关系将通过在受控气氛下热退火过程中的电学测试、四点弯曲附着力测试、纳米压痕、原子力显微镜、X射线光电子能谱和透射电子显微镜的组合来揭示。广泛的影响：这种方法的成功将通过消除金属和介质之间的界面势垒层来彻底改变具有亚50纳米器件的集成电路的布线设计和制造。从这项研究中获得的新知识将为分子工程多孔介质的关键性质提供原子学上的见解，有助于将纳米结构自组装与器件制造相结合，并有助于连接微/纳米器件技术。该项目还将通过分子自组装、溶胶-凝胶工艺、材料表征以及器件制造和测试方面的研究，为研究生和本科生提供一个独特的跨学科培训机会。与IBM的协作互动将丰富学生的学习体验。计划为两名高中教师进行暑期实习，以创建并分享演示，供他们在课堂上使用。这项新活动将补充正在进行的对首都地区和伦斯勒高中的访问和反向访问，有助于提高学生对自组装和纳米设备的认识，以及它们与应用物理和化学的联系，以及Kindle学生对科学和工程的兴趣。这项研究将通过一个互动的网络模块整合到PI教授的纳米结构材料的自组装和分子纳米结构课程中。

This project aims for a new strategy to develop a unique class of nanoporous low permittivity Si-C-H-O dielectric material with built-in thermochemical and mechanical stability, and enable its integration with Cu wiring in integrated circuits without using a separate interfacial layer. Rapid Cu diffusion into adjacent insulating dielectric material and poor Cu-dielectric interfacial adhesion are major issues in device wiring in electronic circuits. Typically, 10-20 nm-thick transition-metal based interfacial barrier layers are used to circumvent the problem. Such thick barrier layers cannot be used in sub-50-nm devices because they decrease the space meant for low-resistivity Cu and neutralize the main advantage of Cu wiring. Ultrathin (e.g., 3 nm) barriers required of these materials are not easy to deposit by conventional methods, especially to conformally coat high depth-to-width aspect ratio features common in multilevel wiring. Intellectual merit: Self- assembled molecular nanolayers (SAMs) offer potential to overcome shortcomings of conventional barriers while enhancing the chemical and mechanical integrity of the Cu-dielectric interface. This project seeks to integrate low-polarizability organosilane SAMs into porous dielectrics during synthesis and develop an understanding of the electrical and mechanical properties, and chemical and thermal stability, to enable the direct integration of this material with Cu. The approach involves incorporating (a) chemical-attack-inhibiting moieties on external and internal surfaces and (b) molecular bridges and ordered pores to mechanically reinforce porous dielectrics. Specific objectives are to: (i) Synthesize barrier-less dielectrics through the incorporation of pore-passivating and adhesion-enhancing molecular moieties into silica-based porous dielectrics; (ii) Mechanically reinforce the porous dielectric by creating ordered pores, and molecular bridging of pore walls by cross-linking low-polarizability organosilanes; (iii) Characterize the effects of the above strategies on dielectric properties, thermal and chemical stability, resilience to Cu-diffusion, and Cu-dielectric interfacial adhesion; and (iv) Understand and optimize the effects of molecular termini, chain length, and fraction of intra-pore molecular crosslinking, and processing parameters on properties. To achieve the above, organosilanes with Cu immobilizing, hydrophobic, or cross-linkable termini will be introduced into micellar templates used in sol-gel synthesis of porous silica, and integrated with the dielectric during gelation and post-treatments. Processing-structure-chemistry-property relationships will be revealed through a combination of electrical tests during thermal annealing in controlled ambients, four-point-bend adhesion tests, nanoindentation, atomic force microscopy, x-ray photoelectron spectroscopy, and transmission electron microscopy.Broader impact: The success of this approach could revolutionize wiring design and fabrication for integrated circuits with sub-50-nm devices by obviating interfacial barrier layers between metals and dielectrics. The new knowledge gained from this study will provide atomistic insights on key properties of molecularly engineered porous dielectrics, aid in combining nanostructure self-assembly with device fabrication, and contribute towards bridging micro- and nano-device technologies. The project will also provide a unique opportunity for interdisciplinary training of graduate and undergraduate students through research in molecular self-assembly, sol-gel processing, materials characterization, and device fabrication and testing. Collaborative interactions with IBM will enrich the students' learning experience. A summer internship for two high-school teachers is planned to create and share demonstrations for use in their classrooms. This new activity will complement ongoing visits and reverse-visits to high-schools in the capital region and Rensselaer, contribute to increasing students' awareness on self-assembly and nanodevices and their connection with applied physics and chemistry, and kindle students' interest in science and engineering. The research will be integrated in the self-assembly and molecular nanostructures of a Nanostructured Materials course taught by the PI through an interactive web-module.