Formal Techniques for Adaptive Circuit Fabrics

提案编号：0541330标题：自适应电路结构的形式化技术PI：Michael Orshansky，德克萨斯大学奥斯汀分校CoPI：Dennis西尔维斯特，密歇根大学摘要：纳米级CMOS技术的出现以器件和电路参数的大量不确定性和不可预测性为特征。这通过危及设计的功能正确性和通过降低良率来威胁现有的集成电路设计范例。统计计算机辅助设计工具最近被提出作为处理可变性的一种方式。然而，许多变异性是系统性的，而不是随机的，包括强烈的空间相关性。在这种情况下，统计技术可能不足以保持良好的产量。另一种正交方法是使用自适应电路结构，即使在存在底层工艺变化的情况下，该自适应电路结构也试图保证和实施电路中的指定行为。这些技术依赖于检测工艺和环境条件，并调整某些电路特性以使设计保持在其规格范围内。本研究的目的是开发一个正式的方法，自动化电路合成到自适应电路结构。集成电路的自适应设计范例通过将自适应电路结构沿着与目标设计一起合成来实施可预测的行为。这项研究的预期成果是一种方法，保留了传统的设计流程的基础。设计综合工具本身插入足够的适应性，以保证指定的功率，性能和产量水平。这项研究将共同开发自适应插入的建模和算法方面，并将探索新的电路级技术，以适应低粒度的行为。

Proposal No: 0541330 Ttile: Formal Techniques for Adaptive Circuit Fabrics PI: Michael Orshansky, , University of Texas at Austin CoPI: Dennis Sylvester, University of MichiganABSTRACT:The advent of nanometer scale CMOS technology is characterized by substantial uncertainty and unpredictability of device and circuit parameters. This threatens the existing integrated circuit design paradigm by endangering the functional correctness of the designs and by reducing yield. Statistical computer-aided design tools have been recently proposed as a way to deal with variability. Much of variability, however, is systematic rather than random, including strong spatial correlations. In that case, statistical techniques may not be sufficient to maintain good yield. An alternative and orthogonal approach is the use of adaptive circuit fabrics that seek to guarantee and enforce a specified behavior in circuits even in the presence of underlying process variation. These techniques rely on sensing the process and environmental conditions and adjusting certain circuit properties to keep the design within its specifications. The objective of this research is to develop a formal approach to automated circuit synthesis onto adaptive circuit fabrics. The adaptive design paradigm for integrated circuits enforces predictable behavior through synthesizing adaptive circuit fabrics along with the target design. The desired outcome of this research is a methodology that preserves the foundations of a traditional design flow. The design synthesis tools themselves insert sufficient adaptivity to guarantee specified power, performance, and yield levels. This research will jointly develop the modeling and algorithmic aspects of adaptivity insertion, and will also explore new circuit-level techniques for adaptive behavior at low levels of granularity.