CAREER: Processors for the Computation of Future Digital Signal Processing Applications

[摘要]bevan BaasU， California - DavisCAREER：用于未来数字信号处理应用计算的处理器需要高水平数字信号处理（DSP）的应用正变得越来越普遍，例如GPS接收器、Wi-Fi无线网络、3D医学成像和手机。随着这些应用变得越来越复杂和便携，它们的性能和功耗要求往往超过了现代DSP处理器的能力。本研究的目标是开发高性能和低功耗DSP处理器的新架构，电路和软件，以满足新兴和未来DSP应用的需求，并且也非常适合未来的半导体制造工艺。研究成果被引入到本科和研究生水平的课程中，其他研究人员也参与到合作努力中。这项研究的结果有望实现新的嵌入式、医疗、环境和消费者应用。为了实现项目目标，研究人员开发了在几个层面上具有新功能的DSP系统。首先，采用创新的架构、粒度、时钟、互连和电路，开发出具有高性能和高能效的易于扩展的可编程构建块处理器。其次，为共享块（如大型存储器阵列和专用DSP处理器）开发了高效架构，以及将这些块有效集成到可编程DSP阵列中的方法。第三，开发了包括编译器和自动映射工具在内的软件工具，使系统更容易编程。第四，为了证明在性能和能源效率方面的收益，该系统在硅中实现，测试和表征。

Abstract0546907Bevan BaasU of California - DavisCAREER: Processors for the Computation of Future Digital Signal Processing ApplicationsApplications requiring significant levels of Digital Signal Processing (DSP) are becoming increasingly commonplace examples include GPS receivers, Wi-Fi wireless networking, 3D medical imaging, and cell phones. As these applications become increasingly sophisticated and more frequently portable, their performance and power dissipation requirements often exceed the capabilities of modern DSP processors. Thegoal of this research is to develop novel architectures, circuits, and software for high performance and low power DSP processors that meet the demands of emerging and future DSP applications, and that are also well-suited to future semiconductor fabrication processes. Research results are introduced into both undergraduate and graduate level courses and other investigators are involved in collaborative efforts. Results of this research are expected to enable new embedded, medical, environmental, and consumer applications.To achieve project goals, the investigators develop DSP systems with features that are new on several levels. First, easily-scalable programmable building block processors with high performance and high energy efficiency are developed using innovative architectures, granularity, clocking, interconnection, and circuits. Second, efficient architectures are developed for shared blocks such as large memory arrays and specialpurpose DSP processors, as well as methods for effectively integrating these blocks into the programmable DSP array. Third, software tools including a compiler and automatic mapping tools are developed to more easily program the system. Fourth, to demonstrate gains in performance and energy efficiency, the system is implemented in silicon, tested, and characterized.