CT: Well-Typed Trustworthy Computing in the Presence of Transient Faults

大卫沃克普林斯顿大学0627650小组：060970良好类型的可信计算在瞬态故障的存在摘要在最近几十年，微处理器的性能一直呈指数级增长，在很大程度上是由于更小和更快的晶体管通过改进的制造技术。虽然这种晶体管可以提高性能，但它们较低的阈值电压和较紧的噪声容限使它们不太可靠，使使用它们的处理器更容易受到高能粒子撞击芯片引起的瞬态故障的影响。 这些错误会破坏计算，使计算机崩溃，并造成严重的经济损失。 事实上，太阳微系统公司、赛普拉斯半导体公司和惠普公司最近都承认，由于瞬时故障，客户端出现了大量故障。这个项目解决了几个基本的科学问题：一个人如何构建一个在有故障的硬件上运行的软件系统，同时又能提供绝对的可靠性保证？ 对于哪些故障模型可以提供这些保证？ 能否证明一个给定的实现确实容忍模型描述的所有错误？ 在这些科学问题的答案的部分驱动下，这个项目将产生一个值得信赖的，灵活的和高效的计算平台，它可以容忍暂时的错误。 多学科项目团队将通过开发以下内容来实现这一目标：（1）编程语言级的可靠性规范，这样消费者就可以决定他们需要的可靠性级别，（2）可靠性保护编译和优化技术，以提高可靠代码的性能，但确保正确性（3）自动的机器级验证器，这样编译器生成的代码就可以被证明是可靠的，（4）在硬件/软件边界实现可靠性规范的新的软件调制容错技术;（5）在可靠性、性能、功耗和成本之间进行权衡的微体系结构优化。

David WalkerPrinceton University0627650Panel: 060970Well-typed trustworthy computing in the presence of transient faultsAbstractIn recent decades, microprocessor performance has been increasingexponentially, due in large part to smaller and faster transistorsenabled by improved fabrication technology. While such transistorsyield performance enhancements, their lower threshold voltages andtighter noise margins make them less reliable, rendering processorsthat use them more susceptible to transient faults caused by energeticparticles striking the chip. Such faults can corrupt computations,crash computers, and cause heavy economic damages. Indeed,Sun Microsystems, Cypress Semiconductor and Hewlett-Packardhave all recently acknowledged massive failures at client sitesdue to transient faults.This project addresses several basic scientific questions: How does onebuild software systems that operate on faulty hardware, yet provideironclad reliability guarantees? For what fault models can theseguarantees be provided? Can one prove that a given implementation doesindeed tolerate all faults described by the model? Driven in part bythe answers to these scientific questions, this project will produce atrustworthy, flexible and efficient computing platform that toleratestransient faults. The multidisciplinary project team will do this bydeveloping: (1) programming language-level reliability specifications soconsumers can dictate the level of reliability they need, (2)reliability-preserving compilation and optimization techniques toimprove the performance of reliable code but ensure correctness (3)automatic, machine-level verifiers so compiler-generated code can beproven reliable, (4) new software-modulated fault tolerance techniquesat the hardware/software boundary to implement the reliabilityspecifications, and finally (5) microarchitectural optimizations thatexplore trade-offs between reliability, performance, power, and cost.