Collaborative Research: GOALI: New Algorithm and Architecture Solutions for Ultra-High-Throughput Single Carrier Communication System Geared to High Capacity Storage
Collaborative Research: GOALI: New Algorithm and Architecture Solutions for Ultra-High-Throughput Single Carrier Communication System Geared to High Capacity Storage
批准号:
0701716
负责人:
Tong Zhang
金额:
$14.4万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2007
资助国家:
美国
项目状态:
已结题
起止时间:
2007-06-01 至 2010-12-31
中文摘要
集成、混合和复杂系统Jaekyun Moon,明尼苏达大学双城分校Tong Zhang,伦斯勒理工学院合作:目标:面向高容量的超高吞吐量单载波通信系统的新算法和架构解决方案知识优势:高容量、高吞吐量磁盘驱动器是许多现代计算系统的关键组件。 本研究的目的是设计,整合,并共同优化软输出均衡和错误控制算法的应用到大容量存储。 该项目还将导致一个超大规模集成(VLSI)架构解决方案,以实现高容量,高吞吐量的数字信息存储,同时考虑到磁盘驱动器通道的限制和特点。 特别地,具有超过每秒5吉比特(Gbps)的吞吐量的“读取通道”解决方案针对接近每平方英寸1太比特的存储密度的盘驱动器。 为了实现这一吞吐量,同时保持能力,需要密切和积极的互动之间的研究算法和超大规模集成电路架构。 这两个领域都需要创新。 该项目将首先将算法和VLSI实现协同设计方法应用于软输出网格检测器和纠错解码器,这是两个计算最密集的功能块,因此是能量和硅饥饿的功能块。 然后,该项目将对包括均衡器和网格检测器的信号检测子系统以及包括内部错误控制编码和外部错误校正编码的编码子系统进行集成设计和优化。 第三,应用系统优化以确定平衡整个数据路径的性能和实现复杂性的各个功能块的最佳配置。通过信号检测和解码器块的高级软信息处理作为技术基石,重点是基于网格的仅前向软输出均衡器和低密度奇偶校验(LDPC)纠错编码,更广泛的影响:这项研究有可能促进极高容量的数据存储磁盘驱动器的发展,具有广泛的应用,包括“移动的互联网”和无线多媒体广播的便携式大容量存储设备。 与工业界密切合作将促进向工业界转让技术。 该项目还将教育学生阅读通道算法和实施,自然为行业提供理论和实际系统约束知识的潜在员工。 将积极征聘妇女和其他代表性不足的群体担任研究助理。 课程开发包括一个新的研究生水平的信号处理课程,增强一个本科课程,高级和荣誉的设计项目,并将编码/信号处理算法的研究结果纳入现有的研究生课程数字通信,信息理论和差错控制编码。
英文摘要
Integrative, Hybrid and Complex SystemsJaekyun Moon, University of Minnesota-Twin CitiesTong Zhang, Rensselaer Polytechnic InstituteCOLLABORATIVE: GOALI: New Algorithm and Architecture Solutions for Ultra-High-Throughput Single Carrier Communication System Geared to High Capacity StorageIntellectual Merit: High-capacity, high-throughput disk drives are a critical component of many modern computing systems. This research aims to devise, integrate, and jointly optimize soft-output equalization and error control algorithms for application to high-capacity storage. The project will also lead to a very-large-scale-integrated (VLSI) architecture solution for enabling high-capacity, high-throughput storage of digital information, taking into account the constraints and characteristics of the disk drive channel. In particular, a "read channel" solution with a throughput exceeding 5 gigabits per second (Gbps) is targeted for disk drives approaching a storage density of 1 terabit per square inch. To achieve this throughput while maintaining capacity requires close and active interaction between research in algorithms and VLSI architecture. Innovations are necessary in both areas. The project will first apply algorithm and VLSI implementation co-design methods to a soft-output trellis detector and error correction decoder, the two most computationally-intensive and, hence, energy and silicon-hungry functional blocks. The project will then pursue integrated design and optimization of the signal detection sub-system that includes an equalizer and trellis detector and of the coding sub-system that includes inner error control coding and outer error correction coding. Third, system optimization is applied to determine the best configuration of individual functional blocks that balances performance and implementation complexity of the entire data path. Advanced soft-information processing through signal detection and decoder blocks serves as the technical cornerstone, with a focus on forward-only trellis-based soft-output equalizer and low-density parity-check (LDPC) error correction coding combined with high-rate inner error control coding.Broader Impact: This research has the potential to facilitate the development of extremely high-capacity disk drives for data storage, with a wide array of applications including portable mass storage devices for the "mobile Internet" and wireless multimedia broadcasting. Close collaboration with industry will facilitate technology transfer to industry. The project will also educate students on read channel algorithms and implementation, naturally providing industry with potential employees with knowledge of both theory and practical system constraints. Women and other under-represented groups will be actively recruited as research assistants. Curriculum development includes a new graduate-level course on signal processing, enhancements to one undergraduate course, senior and honor's design projects, and incorporating findings on the coding/signal processing algorithms into existing graduate courses on digital communication, information theory and error control coding.
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