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CPA-CSA-T: ATAC: Enhancing Multicore Programmability through All-to-All Computing

CPA-CSA-T: ATAC: Enhancing Multicore Programmability through All-to-All Computing
CPA-CSA-T:ATAC:通过全面计算增强多核可编程性
批准号:
0811724
负责人:
Anant Agarwal
金额:
$100.0万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2008
资助国家:
美国
项目状态:
已结题
起止时间:
2008-08-01 至 2012-07-31

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项目成果

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中文摘要
翻译
计算世界已经一代又一代地转向多核作为一种寻址方式。摩尔?s Gap,?(the顺序处理器提供的性能和摩尔设定的扩展期望之间的差距越来越大?s law.) 如今,双核和四核多核已经司空见惯,预计到下一个十年中期将扩展到数千个内核。 不幸的是,由于即使是两核和四核多核(更不用说千核多核)也非常难以编程,因此多核架构的广泛接受受到了威胁。 多核编程的挑战是一个严肃的问题,需要我们思考架构、编程和软件的大胆新方法。ATAC项目基于一个简单的想法:从任何核心到所有其他核心的低延迟、低能耗广播机制可以在多核可编程性方面向前迈出一大步。 广播机制是通过一种新的CMOS集成芯片级光互连,使用WDM(波分复用)与多个添加/丢弃点。 光学互连增强了平铺式多核处理器中的传统电网格互连。 虽然点对点电互连能够提供与片上光互连竞争的性能,但它并没有解决可编程性问题。 因此,在ATAC中,光广播能力并不取代基本的电互连,它只是为了可编程性而增强了它。 因此,为了极大地简化多核编程,该项目将设计ATAC计算机架构,该架构通过片上光广播网络增强片上网状网络。 这样的网络能够实现极快的广播通信,使程序员能够充分利用多核机会,即使多核扩展到数千个核。 实现这一点的一种方法是启用新的分布式一致共享内存架构,为当前的编程模型提供有效的支持。 尽管这种广播能力有可能大大加快现有算法的速度,但它最大的吸引力在于它能够促进新的、易于使用的编程模型。 因此,该项目还将开发由廉价广播促进的编程模型和API(应用程序编程接口),并评估对性能和编程容易性的影响。ATAC项目将与UCSD的Arsenal项目合作,该项目正在开发大规模异构多核,以推动对高效片上互连的需求。
英文摘要
The computing world has made a generational shift to multicore as a way of addressing ?Moore?s Gap,? (the growing disparity between the performance offered by sequential processors and the scaling expections set by Moore?s law.) Two- and four-core multicores are commonplace today, with scaling to thousands of cores expected by the middle of the next decade. Unfortunately, because even two- and four-core multicores (let alone thousand-core multicores) are extremely hard to program, the widespread acceptance of multicore architectures is threatened. The multicore programming challenge is a serious issue that requires us to think about bold new approaches to architecture, programming, and software.The ATAC project is based on one simple idea: that a low-latency, low-energy broadcast mechanism from any core to all other cores can yield a big step forward in multicore programmability. The broadcast mechanism is enabled by a novel CMOS-integrated chip-level optical interconnection using WDM (wave-division multiplexing) with multiple add/drop points. The optical interconnect augments a traditional electrical-mesh interconnect in a tiled multicore processor. Although point-to-point electrical interconnect is capable of delivering performance that is competitive with on-chip optical interconnect, it does not solve the programmability issue. Thus, in ATAC, the optical broadcast capability does not replace basic electrical interconnect, it simply augments it for programmability. Accordingly, to drastically ease programming for multicores, this project will design the ATAC computer architecture that augments an on-chip mesh network with an on-chip optical broadcast network. Such a network enables blazingly fast broadcast communication that will allow programmers to take full advantage of the multicore opportunity, even as multicores scale to thousands of cores. One way it can accomplish this is by enabling novel, distributed coherent-shared-memory architectures that provide efficient support for current programming models. Although this broadcast capability has the potential to greatly speed-up existing algorithms, its greatest appeal lies in its ability to facilitate new, easy-to-use programming models. Therefore, this project will also develop programming models and APIs (application programming interfaces) facilitated by a cheap broadcast, and evaluate the resulting impact on both performance and programming ease. The ATAC project will collaborate with UCSD's Arsenal project, which is developing massively heterogeneous multicores that drive the demand for efficient on-chip interconnects.
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EAGER: Technologies for Elastic OS Services in fos
Experimental Systems: Baring It all Software: The MIT Raw Machine
Protection and Translation in Multimodel Multiprocessors: The MIP FUGU Workstation
U.S. - Japan Seminar: Parallel Symbolic Computing: Languages, Systems, and Applications/October 1992/ Cambridge, Massachusetts
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