MRI: Development of a GPU-Enabled Integrated Storage Computation Architecture and System

该项目基于GPGPU技术（CUDA，CTM）开发了一个实验性的高性能计算/存储平台，将存储与计算更紧密地结合在一起，同时实现了比当前商业高端控制器更高的性能和可用性。这项工作强调设计、性能分析、集成、优化和构建，旨在实现高可靠性的海量存储，同时保持成本效益和高性能。将设计计算/存储层次结构，在小规模下使用不同的组件进行研究，进一步优化，并最终在全规模上构建（达到250+ TB）。GPU性能证明是一个？颠覆性技术？使体系结构能够以最高性能提供I/O，这是单靠多核x86系统无法实现的。高性能、高可靠性的并行I/O将与计算共存，并通过pNSF得到支持，而不仅仅是作为附加的SAN架构或有限的直接连接存储。引入更简单的控制器（JBOD加故障转移）并使用GPU来卸载RAID计算和重建，独立控制器和CPU子系统的系统抽象障碍应该会减弱。由于在大型安装中实际上以非平凡的速率发生故障，因此系统将可配置为具有RAID配置的高性能（例如，三个磁盘或更高的故障恢复能力）。构建的大型系统将用于测试可靠性和性能。将计算移动到更接近存储的能力推动了实验架构，该架构将支持可扩展的科学算法以及现代互联网应用程序后端。如果成功的话，集群和网格节点的架构可能会从x86-64服务器加上本地RAID或SAN存储转移到这种异构架构，同时保留编程范例（例如，MPI-2 + Pthreads）。基于当前和近期的COTS组件，单靠多核x86-64 CPU可能不足以实现高可用性、高性能存储和计算。此外，可以将GPU与CPU融合的硅优化可能不会显著降低所提出的集群架构和相关系统集成工作的长期价值。

This project, developing an experimental high performance computing/storage platform based on GPGPU technologies (CUDA, CTM), integrates storage more closely with computation, while achieving higher performance and availability than current commercial high-end controllers. Emphasizing design, performance-analysis, integration, optimization, and construction, the work seeks to enable the construction of massive storage with high reliability, while remaining cost effective and high performing. A computation/storage hierarchy will be designed, studied with diverse components at small scale, optimized further, and finally constructed at full scale (reaching 250+ terabytes). GPU performance proves to be a ?disruptive technology? enabling the architecture to deliver I/O at full performance, something not possible with multicore x86 systems alone. High performance, high reliability parallel I/O will coexist with computation and be supported through pNSF, rather than being presented only as add-on SAN architecture or as limited direct attached storage. Introducing simpler controllers (JBOD plus failover) and using GPUs for offloading RAID computation and reconstruction, systemic abstraction barriers of separate controller and CPU subsystems should weaken. Since failures occur in practice at non-trivial rates in large installations, the system will be configurable for high performance with RAID configurations (e.g., three-disk-or-higher failure resiliency). The constructed large-scale system will be used to test reliability and performance. The ability to move computation closer to storage drives the experimental architecture that will support scalable scientific algorithms as well as modern Internet application back-ends. If successful, the architecture of the clusters and grid nodes might shift from x86-64 servers plus local RAID or SAN storage to this heterogeneous architecture while conserving programming paradigms (e.g., MPI-2 + Pthreads). Muticore x86-64 CPUs alone might be insufficient for achieving high availability, high performance storage and computation based on current and near-term COTS components. Furthermore, silicon optimizations that may converge GPUs with CPUs might not significantly diminish the long-term value of the proposed cluster architecture and associated systems integration work.