CAREER: Co-optimization of Integrated Circuit Design and Manufacturing

提案ID: 0846196题目：职业：集成电路设计和制造的协同优化pi名称：Puneet gupta此职业提案旨在研究集成电路设计和制造过程的协同优化方法，以提高功率，性能，产量，成本和周转期。未来十年，半导体行业可能会在制造和设备技术方面发生几次根本性的变化。每一项技术都需要大量的研究投资才能被采用。对设计方法和技术工具进行常规的事后更改会导致精力的浪费和技术的未充分利用。因此，本项目侧重于技术选择所施加的电路设计限制的早期评估。？等效比例?改进——或许相当于一代完整的技术——必须来自不同领域之间的新协同效应。从集成电路的设计到制造流程。PI计划开发一种由设计分析驱动的制造过程优化算法方法，以显着加快产量斜坡并改善产品特性。在过去的几十年里，半导体推动了财富创造和提高生活质量的技术革命。拟议研究的更广泛影响来自于使芯片设计师和制造商能够共同开发未来技术，以实现经济实惠，高性能，高密度，低功耗的集成电路。我的工作将为设计技术和工艺技术路线图提供信息，从而使电子行业能够从底层技术中获得最大的产品效益。该提案的教育部分将培养一批了解流程交互的新一代设计师和了解设计含义的流程/设备工程师。PI将利用加州大学洛杉矶分校广泛的多样性和外展资源，从女性和代表性不足的群体中招收学生。

Proposal ID: 0846196Title: CAREER: Co-optimization of Integrated Circuit Design and ManufacturingPI name: Puneet GuptaThis CAREER proposal aims to investigate methods for co-optimization of integrated circuit design and the manufacturing process for improved power, performance, yield, cost and turnaround time. The semiconductor industry is likely to see several radical changes in the fabrication and device technologies in the next decade. Each of these technologies requires enormous research investment before they can see any adoption. Conventional after-the-fact changes to design methodologies and tools to technology leads to wasted effort and under-utilization of technology. Therefore, this project focuses on early assessment of circuit design restrictions imposed by technological choices. ?Equivalent scaling? improvements - perhaps as much as one full technology generation - must come from new synergies between various ?silos? of the integrated circuit design to manufacturing flow. The PI plan on developing an algorithmic method of manufacturing process optimization driven by design analyses to significantly speed up yield ramp and improve product characteristics.Semiconductors have fueled wealth creation and technological revolution for better quality of life in the past few decades. The broader impact of the proposed research comes from enabling chip designers and manufacturers to co-develop future technologies for affordable, high-performance, high-density, low-power integrated circuits. My work will inform both the design technology and process technology roadmaps, so as to enable the electronics industry to derive maximum product benefit from underlying technology. The education component of the proposal will train a new breed of designers who are aware of process interactions and process/device engineers aware of design implications. The PI will leverage UCLA's extensive diversity and outreach resources to recruit students from female and underrepresented groups.