Nanowire Specialty Diodes for Integrated Applications

本研究的目的是探索可单独寻址的高密度阵列的专业二极管（p/n结，肖特基，齐纳，金属-半导体-金属和隧道结构）的垂直硅和锗纳米线生长的气-液-固方法。 它将研究二极管的性能和设计与纳米线特性的相互作用，同时解决处理的挑战。 这种二极管阵列的应用范围从交叉点存储器的选择器件到光学传感和能量收集。 该方法是基于自下而上的制造垂直的Si，Ge和Si/Ge异质结构纳米线生长与原位掺杂。 它结合了洛斯阿拉莫斯国家实验室集成纳米技术中心开发的种子和生长能力，以及亚利桑那州立大学的晶片加工和器件建模、设计和测试专业知识，这项工作的智力价值在于理解生长过程、产生的物理结和二极管的电学行为之间的相互作用。 这些纳米线二极管的传输特性的建模将比较的实验结果，如电流电压特性。 这项研究的更广泛影响在于其教育成分和对电子行业的潜在价值。 学生与洛斯阿拉莫斯国家实验室综合纳米技术中心的研究人员合作的机会尤其宝贵。 由于该研究旨在将纳米线器件早日引入主流CMOS技术，因此对我们的国家竞争力和整个社会都很重要的行业可能产生巨大影响。

The objective of this research is to explore individually addressable high density arrays of specialty diodes (p/n junction, Schottky, Zener, metal-semiconductor-metal and tunnel structures) made from vertical silicon and germanium nanowires grown with the vapor-liquid-solid method. It will study the diode performance and design interaction with the nanowire characteristics while addressing processing challenges. Arrays of such diodes have applications ranging from select devices for crosspoint memories to optical sensing and energy scavenging. The approach is based on bottom-up fabrication of vertical Si, Ge, and Si/Ge heterostructure nanowires grown with in-situ doping. It combines the seed and growth capabilities developed at the Los Alamos National Laboratory Center for Integrated Nanotechnologies with the wafer processing and device modeling, design, and testing expertise at Arizona State University.The intellectual merits of this work lie in understanding the interactions between the growth process, the resulting physical junction, and the electrical behavior of the diode. Modeling of the transport characteristics of these nanowire diodes will be compared to experimental results such as the current voltage characteristics. The broader impacts of this research lie in its educational component and the potential value to the electronics industry. The opportunity for the student to work with researchers at the Los Alamos National Laboratory Center for Integrated Nanotechnologies is especially valuable. Since the research is aimed at enabling the early introduction of nanowire devices into mainstream CMOS technology, there is a potentially large impact on an industry which is important to our national competitiveness and to society in general.