SHF: Small: Software and Hardware Integration with Feedback and Transparency for Many-Core Computing

多核处理器正变得越来越普遍，并提供了继续增加我们的计算能力的手段。这些在芯片上具有多个处理核心的新兴平台提供了同时运行多个程序的能力，从而提高了计算系统的处理能力。然而，由于运行的程序通常共享多核资源，因此这些程序之间的执行干扰效应可能会损害它们的性能。通常情况下，软件对这种底层硬件行为的遗忘加剧了多核性能问题。这种不利影响限制了我们在干扰可能有害的领域（如高性能计算和云计算）的计算进展，并可能进一步使这些先进处理器在航空电子和汽车等关键任务领域的可预测性和部署复杂化。因此，了解多核处理器上的软件行为和干扰效应对于充分利用其潜力至关重要。在本研究中，研究人员对多核处理器平台上多个软件线程之间的执行干扰所产生的问题进行了初步研究。这项研究涉及重新审视硬件资源管理如何通过增强硬件和操作系统（OS）之间的接口来考虑应用程序级约束（如性能隔离，公平性和优先级），并研究硬件和软件开销。该研究为基于主动细粒度资源监控的硬件-操作系统交互以及硬件和操作系统之间的双向适配奠定了基础，以严格控制线程之间的干扰影响。

Multi-core processors are becoming prevalent and provide means for continuing to increase our computational capacity. These emerging platforms with multiple processing cores on chip offer the capability to run multiple programs simultaneously, thereby increasing the processing power of computing systems. However, since the running programs often share multi-core resources, execution interference effects between such programs can hurt their performance. Often times, software obliviousness to this underlying hardware behavior exacerbate the multi-core performance problem. Such adverse effects limit our computational progress in areas where interference can be detrimental such as high-performance computing and cloud computing, and could further complicate the predictability and deployment of these advanced processors in mission-critical domains such as avionics and automobiles. Therefore, understanding software behavior and Interference effects on multi-core processors is crucial to harnessing their full potential.In this research the investigators do preliminary studies of the issues arising from execution interference between multiple software threads on multi-core processor platforms. This research involves revisiting how hardware resource management can account for application-level constraints (such as performance isolation, fairness, and priority) by enhancing the interface between hardware and the Operating System (OS), and studying the hardware and software overheads. This research lays the groundwork for the hardware-OS interaction based on active fine-grained monitoring of resources and a two-way adaptation between both the hardware and OS to tightly control the effects of interference between threads.