SHF: Small: Coordinated Performance Optimization within a Power Budget for Chip Multiprocessors

由于功耗已成为芯片多处理器（CMP）进一步提高吞吐量的主要制约因素，因此一个关键挑战是在CMP的冷却、封装和供电能力所限的功率预算范围内优化CMP的性能。本项目旨在为cmp开发一个协调的功率控制框架。提出的框架具有以下新特点。1)它可以根据测量到的工作负载特征，在CPU内核和CMP中的其他组件之间动态地、显式地转移功率，从而在功率预算内优化CMP性能。2)采用在线模型估计器动态测量各部件贡献的性能，然后在各部件之间划分芯片级功耗预算。3)在CMP功率控制中使用的动态缓存大小调整影响下，可以实现公平或差异化的缓存共享。4)它还协调核心内的组件以实现核心级功率控制，并协调cmp与主存储器和磁盘以优化系统性能。5)我们的框架是基于控制理论的基础，系统地和严格地开发功率控制策略。虽然基本控制理论已经在微处理器电源管理中显示出巨大的前景，但我们的框架的一个重要特征是它依赖于先进的最优控制理论，以整体的方式协调CMP不同层的多个控制和优化回路，以优化性能和保证稳定性。除了将研究与教育和推广计划相结合之外，本研究的结果有望为cmp的性能和功率优化提供有效的机制和丰富的工具。

Since power consumption has become a major constraint for the further throughput improvement of chip multiprocessors (CMPs), a key challenge is to optimize the performance of a CMP within a power budget limited by the CMP's cooling, packaging, and power supply capacities. This project aims to develop a coordinated power control framework for CMPs. The proposed framework has the following novel features. 1) It can dynamically and explicitly shift power among the CPU cores and other components in a CMP based on measured workload characteristics for optimized CMP performance within a power budget. 2) It adopts an online model estimator to dynamically measure the performance contributed by each component and then partitions the chip-level power budget among the components. 3) It can achieve fair or differentiated cache sharing under the impacts of dynamic cache resizing used in CMP power control. 4) It also coordinates components within a core for core-level power control and coordinates CMPs with main memory and disks for optimized system performance. 5) Our framework is based on a control-theoretic foundation for systematically and rigorously developing power control strategies. While basic control theory has already shown great promise in microprocessor power management, an important feature of our framework is that it relies on advanced optimal control theory to coordinate multiple control and optimization loops in different layers of a CMP in a holistic way for optimized performance and guaranteed stability. In addition to integrating research with education and outreach programs, the outcome of this research is expected to provide effective mechanism and a rich set of tools fer performance and power optimization in CMPs.