CAREER: Scaling of Memristive Nanodevices and Arrays

这项职业计划的研究目标是制造，测试，表征和理解具有前所未有的小特征尺寸和高封装密度的忆阻纳米器件和阵列。这些方法是：1）使用纳米压印光刻、电子束光刻、嵌段共聚物的定向自组装以及这些下一代纳米光刻技术的组合来缩放忆阻纳米器件; 2）对不同长度尺度的器件/阵列进行系统的电测量，并阐明缩放规则至亚5 nm范围;以及3）在不同长度尺度下的物理表征和底层器件物理研究。随着CMOS规模接近其极限，我们开发功能更加通用的新器件变得非常重要。忆阻器件是使用高电阻状态和低电阻状态而不是电荷存储为“1”和“0”的双端无源电子器件。因此，器件的可扩展性不受量子效应的限制，而只取决于器件可以做得多小。忆阻器件具有开关速度快、无需擦除即可重写、低功耗、高耐久性和长数据保持时间等优点。这一研究成果将使忆阻纳米器件（3 nm）在10 Tbits/in 2的密度阵列中得到更小的尺寸，为高密度非易失性数据存储和非易失性逻辑提供一种通用的解决方案。随着不同尺寸的器件的可用性，对器件开关行为（功耗、耐久性、开关速度、数据保留时间等）的全谱研究作为尺寸的函数将扩展到5 nm以下。因此，拟议的研究将增加我们对开关机制/器件物理的理解，并将我们的知识扩展到尚未实现的物理机制。更广泛的影响拟议的工作将产生重大的科学，教育和社会影响。该研究将推动集成电路（IC）行业的变革性设备技术，维持美国在高科技领域的竞争力。该职业建议的教育目标是培养下一代研究人员和工程师，并为学生，STEM（科学，技术，工程和数学）教师和公众创造激励学习的机会。实现这些目标的方法包括：1）为研究生和本科生设计半导体和纳米技术的创新课程; 2）激发本科生，特别是妇女和少数民族学生的研究经验;和3）参与外展活动，如麻省大学阿默斯特分校的纳米技术暑期研究所，12名教师和促进纳米科学使用艺术之间的更广泛的观众，包括公众。

The research objectives of this CAREER proposal are to fabricate, test, characterize and understand memristive nanodevices and arrays with unprecedentedly small feature size and high packing density. The approaches are: 1) scaling of memristive nanodevices using nanoimprint lithograpy, electron beam lithography, directed self-assembly of block copolymer, and the combination of these next generation nanolithography technologies; 2) systematic electrical measurements of the devices/arrays of different length scale and elucidation of the scaling rules to sub-5 nm regime; and 3) physical characterization and underlying device physics studies at different length scales. Intellectual Merit As CMOS scaling approaches its limit, it is important that we develop new devices more versatile in functionality. Memristive devices are two-terminal passive electronic devices that use high and low resistance states instead of charge storage as '1's and '0's. As a result, the device scalability is not limited by the quantum effect but only dependent on how small the device one can make. Memristive devices have fast switch speed, overwrite ability without erase, low power consumption, high endurance and long data retention time. They are promising for applications in non-volatile memory, non-volatile logic, reconfigurable circuits and neuromorphic networks.This proposed research will lead to significantly smaller memristive nanodevices (3 nm) in the densest arrays (10 Tbits/in2), offering a universal solution to high-density non-volatile data storage and non-volatile logic. With devices of different dimensions available, full spectrum studies in device switching behavior (power consumption, endurance, switching speed, data retention time, etc.) as a function of size will be extended to sub-5 nm. Consequently, the proposed research will increase our understanding of the switching mechanisms/device physics and extend our knowledge to a physical regime not as yet achieved.Broader ImpactsThe proposed work will have significant scientific, educational and societal impact. The research will advance transformative device technologies for the integrated circuits (IC) industry, sustaining the U.S. competitiveness in high-technology areas. The education objectives of this CAREER proposal are to train next generation researchers and engineers, and to create motivating learning opportunities for students, STEM (Science, Technology, Engineering and Mathematics) teachers and the general public. The approaches to accomplishing these goals include: 1) innovative curricula design in semiconductors and nanotechnology for both graduate and undergraduate students; 2) inspiring research experience for undergraduate students, in particular women and minorities; and 3) engaging outreach activities such as Nanotechnology Summer Institute at UMass Amherst for K-12 teachers and promoting nanoscience using art among a much broader audience including the general public.