E2CDA: Type I: Collaborative Research: Energy-efficient analog computing with emerging memory devices

E2CDA：类型 I：协作研究：使用新兴存储设备的节能模拟计算

• 批准号: 1740248
• 负责人: Qiangfei Xia
• 金额: $ 32.1万
• 依托单位: University of Massachusetts Amherst
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2017
• 资助国家: 美国
• 起止时间: 2017-09-15 至 2021-08-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1740248&HistoricalAwards=false
• 关键词: E2CDA; Type; Collaborative; Research; Energy

The main goal of this project is to develop analog computing circuits that will greatly exceed their digital counterparts in energy-efficiency, speed, and density by employing emerging nonvolatile memory devices. Though analog circuits have been around for a long time, their applications in computing have been rather limited, largely due to the lack of efficient implementations of analog weights. This impediment could be overcome now due to the rapid progress in the emerging nonvolatile memory devices, such as metal-oxide memristors, which are the focus in this project. The analog memory functionality of memristors, combined with high retention and sub-10-nm scaling prospects, might for the first time enable extremely fast and energy-efficient analog implementations of many core operations, such as vector-by-matrix multiplication, which are central to many existing and emerging future applications such as internet-of-the-things and sensor networks, robotics, and energy efficient neuromorphic systems. The results of the proposed research will be integrated into educational curriculum and will help to train material science and electrical engineering students of all levels in this exciting field.The main caveat of the considered analog circuits is their limited operation accuracy, primarily due to the noise and variability in memory devices. The mitigation of this challenge by several means will be one of the main focuses of the project, and will be addressed with highly-interconnected research effort across device, circuit, and architectural layers. At the device level, detailed electrical characterization of analog operation and ways to improve it via material engineering, optimization of electrical stress, and development of efficient tuning algorithms to cope with device variations will be explored. Guided by experimentally-verified device models, the design of several representative analog computing circuits will be optimized. Circuit modeling tools will be developed to capture rich design trade offs in area, speed, energy efficiency, and precision, calibrated on experimental results from wafer-scale integrated memristor circuits, and used for detailed comparison with state-of-the-art digital counterparts. Finally, accurate circuit models will guide exploration of circuit architectures that mitigate limitations of analog computing and assist with detailed system level simulations.

该项目的主要目标是开发模拟计算电路，通过采用新兴的非易失性存储器件，在能效、速度和密度方面大大超过数字电路。虽然模拟电路已经存在了很长一段时间，但它们在计算中的应用相当有限，主要是由于缺乏有效的模拟权重实现。由于新兴的非易失性存储器件的快速发展，如金属氧化物忆阻器，这个障碍现在可以克服，这是本项目的重点。忆阻器的模拟存储器功能，结合高保持力和亚10纳米的缩放前景，可能首次实现许多核心操作的极快和节能的模拟实现，例如向量乘矩阵乘法，这是许多现有和新兴未来应用的核心，例如物联网和传感器网络，机器人和节能神经形态系统。 建议的研究结果将被整合到教育课程，并将有助于培养材料科学和电气工程专业的学生在这个令人兴奋的领域的所有水平。所考虑的模拟电路的主要警告是其有限的操作精度，主要是由于噪声和存储设备的可变性。通过多种方式缓解这一挑战将是该项目的主要重点之一，并将通过跨器件，电路和架构层的高度互连的研究工作来解决。在器件层面，将探索模拟操作的详细电气特性以及通过材料工程、电应力优化和开发有效的调谐算法以科普器件变化来改善模拟操作的方法。在实验验证的器件模型的指导下，将优化几个代表性模拟计算电路的设计。将开发电路建模工具，以捕获面积，速度，能效和精度方面的丰富设计权衡，根据晶圆级集成忆阻器电路的实验结果进行校准，并用于与最先进的数字同行进行详细比较。最后，精确的电路模型将指导电路架构的探索，减轻模拟计算的限制，并协助详细的系统级仿真。