SHF: Medium: Collaborative Research: Transactional Software Infrastructures: Making the Most of Hardware Transactions

现代计算机系统正在经历一场广泛的变革。它们变得越来越并行，这意味着多个处理单元或核心一起工作来执行任务。为了促进利用这些新体系结构所需的同步和协调，领先的硬件供应商开发了提供硬件事务性内存的新一代处理器体系结构，这种同步结构承诺避免传统同步方法的许多众所周知的缺陷和限制。向硬件事务的转变将给多核机器的编程方式带来根本性的积极变化。该项目将重新设计基本的同步结构，如锁、内存管理和一系列并发数据结构，如堆、哈希表和跳跃表。这些新的结构将具体体现在一个开源的c++库中。该项目的目标是创建性能更好、更可靠、更便宜的并行软件，可扩展到更大的系统，同时使代码更简单、更可靠。此外，这个项目将增强对硬件事务性内存如何有效使用的理解，这对未来处理器的用户和制造商都有好处。

Modern computer systems are undergoing a pervasive change. They are becoming increasingly parallel, meaning that multiple processing units, or cores, work together to carry out tasks. To facilitate the kinds of synchronization and coordination needed to exploit these new architectures, leading hardware vendors have developed a new generation of processor architectures that provide hardware transactional memory, a synchronization structure that promises to avoid many of the well-known pitfalls and limitations of conventional approaches to synchronization. The move to hardware transactions will bring about a fundamental positive change in the way multicore machines are programmed.This project will redesign basic synchronization structures such as locks, memory management, and a range of concurrent data structures such as heaps, hash tables, and skip lists. These new structures will be embodied in an open-source C++ library. The project's goal is to create better performing, more reliable, and less expensive parallel software, scalable to larger systems, while at the same time making code simpler and more reliable. Moreover, this project will enhance understanding of how hardware transactional memory can be used effectively, a benefit to both users and manufacturers of future processors.