SHF: Small: Compiling Custom Hardware Accelerators from Graph Algorithms

机器学习和数据挖掘中的许多新兴应用都可以归结为图计算。高效的低功耗图计算实现为日益普及的嵌入式和移动平台提供了颠覆性的能力。该项目正在构建GraphGen编译器，以克服创建图形计算硬件加速器的复杂性和难度，这些硬件加速器需要满足嵌入式和移动系统对功率和性能的苛刻限制。GraphGen编译器是一个通用的编译器（在图形计算领域内），用于处理基于不同图形结构（例如，网格形，平面，自然图形）的任意图形应用程序，这些结构可能是静态的，也可能是动态变化的（例如，通过流数据更新），遵循不同的执行策略（例如，同步或异步）。GraphGen实现映射利用可重用的硬件实现模板，允许将相同的图计算规范有效地映射到不同的目标平台上。总的来说，GraphGen编译器从应用程序开发人员（在图形规范中）和硬件设计人员（在可重用的实现模板中）获取知识，并通过将规范自动映射到模板来生成符合应用程序开发人员设计目标的高效嵌入式实现，从而弥合了两个阵营之间的差距。每晶片晶体管的持续指数增长，加上传感器的进步以及机器学习和数据挖掘方面的突破性算法，导致了嵌入式和移动应用领域的一场革命。图计算是许多新兴应用的重要计算范式。GraphGen编译器允许领域专家自动将其图形计算算法转换到高效的fpga加速嵌入式平台上，从而促进这些应用程序快速应用于嵌入式和移动设备。这种新功能提供了一个通用的设计自动化环境，弥合了应用领域专家和硬件设计人员之间的差距，从而使整个行业受益，从而有可能激发图计算和嵌入式硬件架构方面的新研究。

Many emerging applications in machine learning and data mining can be cast as graph computations. Efficient low-power implementations of graph computations promise disruptive capabilities for the increasingly ubiquitous embedded and mobile platforms. The project is building the GraphGen compiler to overcome the complexity and difficulty of creating graph computation hardware accelerators that are needed to meet the demanding power and performance constraints of embedded and mobile systems. The GraphGen compiler is a general-purpose compiler (within the graph computation domain) to handle arbitrary graph applications based on varying graph structures (e.g., grid-shaped, planar, natural graphs) that may be static or dynamically changing (e.g., updated by streaming data) following different execution strategies (e.g., synchronous vs. asynchronous). GraphGen implementation mapping makes use of reusable hardware implementation templates to allow the same graph computation specification to be efficiently mapped onto different target platforms. Overall, the GraphGen compiler captures knowledge from both application developers (in graph specifications) and hardware designers (in the reusable implementation templates), and bridges the gap between the two camps through automatic mapping of a specification to a template to yield a highly efficient embedded implementation tuned to the application developer's design objectives.The continued exponential increase in transistors-per-die, coupled with advances in sensors and breakthrough algorithms in machine learning and data mining, have resulted in a revolution in the embedded and mobile application space. Graph computation is an important enabling computation paradigm for many of these emerging applications. The GraphGen compiler can facilitate rapid adoption of these applications into embedded and mobile devices by allowing domain experts to automatically translate their graph computation algorithms onto efficient FPGA-accelerated embedded platforms. This new capability has the potential to spark new research in graph computation and embedded hardware architectures by providing a common design automation environment that bridges the gap between application domain experts and hardware designers, thus benefiting industry.