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SHF: Small: Collaborative Research: Hybrid Static-Dynamic Analyses for RegionSerializability

SHF: Small: Collaborative Research: Hybrid Static-Dynamic Analyses for RegionSerializability
SHF:小型:协作研究:区域可串行性的混合静态动态分析
批准号:
1422178
负责人:
Milind Kulkarni
金额:
$7.37万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2014
资助国家:
美国
项目状态:
已结题
起止时间:
2014-09-01 至 2018-08-31

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中文摘要
翻译
题目:SHF:小型:协作研究:区域可序列化性的混合静态-动态分析计算机系统的性能几十年来呈指数级增长,促进了科学、卫生、工程和其他领域的进步。然而,由于功率、热量和电线长度的限制,芯片制造商现在生产的微处理器拥有更多的计算核心,而不是更快的计算核心。为了适应这种日益并行的硬件,软件系统必须变得更加并行。然而,编写正确的、可伸缩的共享内存程序是出了名的困难。一个关键的挑战是,现代编程语言以及软件和硬件系统实际上无法为具有称为数据竞争的常见且难以消除的行为的程序提供保证——因为没有人知道如何在保持高性能的同时提供更好的保证。因此,软件很难推理,并且会意外地失败,导致高开发和测试成本,并危及任务和安全关键系统的可靠性和安全性。该项目为软件提供了更强的保障,在当代系统上实现了合理的性能。智力上的优点是新颖的程序分析和运行时支持,为程序提供了强有力的行为保证。该项目的更广泛的意义和重要性是使软件系统自动更加可靠;消除所有类型的错误;通过简化编程来降低开发和测试成本;简化和减少程序分析和软件系统支持的成本。此外,pi的教育、指导和扩展活动通过帮助教育在项目工作中受过培训的计算机科学家的多样化劳动力来增强项目。一个关键的贡献是一种新的静态-动态混合分析,它完全在软件中强制执行称为静态有界区域序列化(SBRS)的内存模型。这种内存模型严格地比顺序一致性(SC)更强,并且有可能比SC更有效地执行,因为它允许编译器和硬件在区域内重新排序指令。该项目涉及设计、实现和评估(1)用于强制SBRS的三种编译器转换,(2)增强静态动态分析以提高性能和灵活性,(3)在强制SBRS时,一种用于与程序执行重叠并发控制的新型异步协议,以及(4)增强软件事务性内存(STM)系统以使用异步协议提高可伸缩性。这项工作首次提供了对始终在线的端到端SBRS的实际支持,并且在为原子性提供高性能运行时支持方面取得了进一步的进展。
英文摘要
Title: SHF: Small: Collaborative Research: Hybrid Static-Dynamic Analyses for Region SerializabilityComputer systems' performance has grown exponentially for decades, enabling advances in science, health, engineering, and other areas. However, due to power, heat, and wire-length limitations, chip manufacturers are now producing microprocessors that have more, instead of faster, computing cores. To scale with this increasingly parallel hardware, software systems must become more parallel. However, writing correct, scalable shared-memory programs is notoriously difficult. A key challenge is that modern programming languages and software and hardware systems provide virtually no guarantees for programs that have a common, hard-to-eliminate behavior called data races -- because no one knows how to provide better guarantees while retaining high performance. As a result, software is difficult to reason about and fails unexpectedly, leading to high development and testing costs, and imperiling reliability and security of mission- and safety-critical systems. This project provides stronger guarantees for software, achieving reasonable performance on contemporary systems. The intellectual merits are novel program analyses and runtime support that provide strong behavioral guarantees for programs. The project's broader significance and importance are making software systems automatically more reliable; eliminating whole classes of errors; reducing development and testing costs by simplifying programming; and simplifying and reducing costs of program analyses and software system support. Furthermore, the PIs' educational, mentoring, and outreach activities enhance the project by helping educate a diverse workforce of computer scientists trained in the project's work.A key contribution is a novel hybrid static-dynamic analysis that enforces a memory model called statically bounded region serializability (SBRS) entirely in software. This memory model is strictly stronger than sequential consistency (SC) and has the potential to be more efficient than SC to enforce, since it allows compilers and hardware to reorder instructions within regions. The project involves designing, implementing, and evaluating (1) three compiler transformations for enforcing SBRS, (2) enhancements to the static-dynamic analysis for performance and flexibility, (3) a novel asynchronous protocol for overlapping concurrency control with program execution while enforcing SBRS, and (4) enhancements to a software transactional memory (STM) system to use the asynchronous protocol to improve scalability. The work provides, for the first time, support for always-on, end-to-end SBRS that is practical, and it makes further advancements in providing high-performance runtime support for atomicity.
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