SBIR Phase II: Thin crystalline technologies for advanced power transistors

该小型企业创新研究(SBIR)第二阶段项目旨在降低采用第一阶段展示的新型剥离技术制造的薄晶功率MOSFET的批量可制造性和可靠性。该项目的更广泛影响/商业潜力是使功率设备能够在从消费到通信、汽车和工业应用的各种应用中根据不同的电压谱要求切换或传输电能，从而实现更低的成本和更好的性能。在所有这些应用中，功率MOSFET和IGBT的导通电阻都可以通过减小器件厚度来降低，从而进一步提高开关速度和性能。此外，在消费和移动应用中，降低功率MOSFET器件的外形系数可以实现更薄、更轻的产品。这项技术的一个重要的更广泛的影响将是减少与功率MOSFET行业中使用的晶片研磨技术相关的昂贵和对环境有害的废物处理过程。虽然使用这项技术开发的功率MOSFET可以产生广泛的商业和社会影响，但这种薄晶体技术的使用可以对所有现代半导体器件产生更广泛的影响，如LED、光伏、柔性CMOS和无源器件。这个小型企业创新研究(SBIR)第一阶段项目解决了功率MOSFET进一步扩展的挑战，功率MOSFET是过去几十年电子革命的关键构建块之一。虽然晶体管的特征尺寸一直在不断缩小，但衬底厚度一直在增加。这些基板目前被机械地减薄，以最大限度地减少厚度增加对性能和外形因素的负面影响。延续这一趋势面临着巨大的挑战，这里提出的薄晶技术和设备架构可以在未来十年内以有利的成本结构继续扩展设备指标。在第一阶段中，用这种薄晶技术演示了功能功率MOSFET，以确定该技术在功率器件中的可行性。这一第二阶段的工作将侧重于将其推向市场的以下具体技术挑战。(1)利用薄晶技术开发具有改进开关特性的功率MOSFET(2)薄晶功率MOSFET的高压大电流表征(3)封装薄晶功率MOSFET器件的工艺良品率和可靠性表征以及(4)在大批量制造流程中改造现有的生产线以使用薄晶剥离技术。

This Small Business Innovation Research (SBIR) Phase II project seeks to de-risk the volume manufacturability and reliability of thin crystalline power MOSFETs fabricated with a novel exfoliation technology demonstrated in Phase 1. The broader impact/commercial potential of this project is to enable lower cost and better performance for power devices in switching or transferring electricity under varying power requirements across the voltage spectrum in a variety of applications ranging from consumer, to communications, automotive and industrial applications. In all of these applications, the ON resistance of the power MOSFET and IGBTs can be reduced and the switching speed and performance further improved by reducing the device thickness. Additionally, in consumer and mobile applications, reducing the form factor of the power MOSFET devices can enable slimmer and lighter products. A significant broader impact of this technology will be the reduction of expensive and environmentally hazardous waste treatment processes associated with wafer grinding technology used in the power MOSFET industry. While the power MOSFETs developed using this technology can have broad commercial and societal impact, the use of this thin crystalline technology can have even broader impact across all modern semiconductor devices such as LED, PV, flexible CMOS and passive devices.This Small Business Innovation Research (SBIR) Phase I project addresses challenges to further scaling of Power MOSFETs which are one of the key building blocks of the electronic revolution over the last few decades. While the feature size of transistors has been constantly shrinking, the substrate thickness has been increasing. These substrates are currently mechanically thinned to minimize the negative impact of this increased thickness on performance and form-factor. There are significant challenges to continue this trend and the thin crystalline technology and device architecture proposed here can enable continued scaling of device metrics over the next decade with favorable cost structures. During phase I, functional power MOSFETs were demonstrated with this thin crystalline technology to establish the feasibility of this technology for power devices. This phase II effort will focus on the following specific technical challenges to bring it to market. (1) Develop power MOSFETs with improved switching characteristics using the thin crystalline technology (2) High voltage high current characterization of the thin crystalline power MOSFETs (3) Process yield and reliability characterization of package thin crystalline power MOSFET parts and (4) Convert existing process line to use thin crystalline exfoliation technology in high volume manufacturing flow.