CNS: SHF: Small: Architectural Support for Efficient and Programmable Non-Volatile Main Memory

计算机系统通常包括存储器和存储装置作为单独且不同的组件。 内存是快速和易失性的，这意味着它会在断电或程序故障时丢失其内容。另一方面，存储速度较慢且非易失性或持久性，并且可以长时间保存文档，照片，应用程序和其他数据，即使在断电的情况下也是如此。 从历史上看，这些组件是不同的，然而，新兴的存储器技术准备打破现状，将更快的存储速度与存储的持久性结合到一个称为非易失性存储器或持久性存储器的设备中。虽然这将简化计算机系统，但它也将在如何运行和如何编程方面产生新的问题和挑战。过去，处理器只与内存交互，但现在它们也将直接与存储交互。持久性存储器将需要来自处理器的新硬件支持，但是迄今为止已经提出的机制会产生很高的开销，并且需要程序员对复杂的硬件级事件进行推理，以正确有效地使用持久性存储器。 一些开销是等待数据写入持久性内存的直接结果，以便程序员可以确定数据保存到存储中。 其他开销是以故障安全的方式执行此操作的结果，换句话说，即使在更新存储时发生故障，也会保留存储中已有数据的完整性。在这两种情况下，处理器的设计都会显著影响与使用持久性内存相关的开销和复杂性。这个项目将研究新的硬件设计，使程序员更容易为未来使用持久主存的系统编写高性能和高效的代码。该项目将培养博士。学生，本科生和专业硕士生在设计未来的计算机系统与新兴的持久存储器技术。这项工作的高潮将是报告发现的研究手稿，实验验证发现的基础设施，以及其他支持文件和数据。该项目产生的手稿将提交给高影响力的期刊和会议，以便计算机系统研究人员和工程师能够了解这些发现，并将这些知识纳入未来系统的设计中。该项目还将支持基于Analog Discovery 2的本科生课程开发工作。 研究手稿，实验基础设施和课程材料将在http://go.ncsu.edu/persistent-memory上提供。

Computer systems typically include memory and storage as separate and distinct components. Memory is fast and volatile, meaning that it loses its contents during power loss or program failure. Storage, on the other hand, is slower and non-volatile, or persistent, and keeps documents, photos, applications, and other data for long periods of time, even throughout a power loss. Historically, these components have been distinct, however, emerging memory technologies are poised to upset the status quo, combining the faster speed of memory with the persistence of storage into a single device known as non-volatile memory, or persistent memory. While this will simplify computer systems, it will also create new problems and challenges in how they function and how they are programmed. In the past, processors only interacted with memory, but they will now interact directly with storage also. Persistent memories will require new hardware support from processors, but the mechanisms that have been proposed so far incur high overheads and require programmers to reason about complex hardware-level events to use persistent memory correctly and efficiently. Some of the overheads are a direct result of waiting for data to be written to persistent memory so that the programmer can be certain that data is saved to storage. Other overheads are the result of performing this operation in a way that is failure-safe, in other words, that even if a failure occurs while updating storage the integrity of the data already in storage is preserved. In both cases, the design of the processor significantly impacts the overheads and complexity associated with using persistent memory. This project will investigate new hardware designs that make it easier for programmers to write high-performing and efficient code for future systems that use persistent main memory. This project will train Ph.D. students, undergraduate students, and Professional Masters students in the design of future computer systems with emerging persistent memory technologies. The culmination this work will be research manuscripts that report findings, infrastructure for experimentally validating the findings, and other supporting documentation and data. The manuscripts produced by this project will be submitted to high impact journals and conferences so that computer systems researchers and engineers can become aware of the findings and incorporate this knowledge into the design of future systems. This project will also support undergraduate curriculum development efforts based on the Analog Discovery 2. The research manuscripts, experimental infrastructure, and curriculum materials will be available at http://go.ncsu.edu/persistent-memory as they are produced.