CSR: SMALL: Virtualized Accelerators for Scalable, Composable Architectures

该项目旨在开发基础技术，以支持下一代计算设备，这些计算设备将为智能手机、自动驾驶汽车和自主机器人等未来无处不在的计算设备提供动力。该项目在计算机系统的硬件和软件层开发新的工具和技术。该项目还将培训新毕业的工程师构建复杂的计算系统，现代软件和硬件设计方法，以及尖端的机器学习技术。所有这些技能在美国工业界都有广泛的需求，但在STEM教育中却没有得到充分的体现。包括通用处理器、图形处理器和为特定计算任务设计的硬件加速器在内的异构架构已被广泛应用于当今边缘和云设备的计算系统中。专门的计算模块在能源效率方面提供了巨大的好处。然而，在设计这样的系统的一个主要挑战是通用性和灵活性的损失，限制了他们的采用，不经常改变的应用程序域的一小部分。如果加速器是由更小的动态可组合块构建的，那么可以解锁更大的灵活性，但现有的方法很难编程和扩展。该项目提出了一个设计流程，以生成一个模板化的系统芯片（SoC）与可组合的加速器系统，可以物理实例化的计算平台的范围。通过虚拟化层，物理硬件块的集合作为虚拟加速器暴露给软件。为了有效地搜索SoC的大设计空间，正在研究新的设计空间探索技术。

This project seeks to develop fundamental technologies to enable the next-generation of computing devices that will power future ubiquitous computing devices such as smartphones, self-driving cars, and autonomous robots. The project develops novel tools and techniques at both the hardware and software layers of computer systems. This project will also train new graduate engineers in architecting complex computing systems, modern software and hardware design methodologies, and cutting edge machine learning techniques. All of these skillsets are in broad demand in US industry but have been underrepresented in STEM education.Heterogeneous architectures comprising general purpose processors, graphics processors, and hardware accelerators designed for specific computing tasks have been widely adopted in today's computing systems for both edge and cloud devices. Specialized computing blocks provide tremendous benefits in energy efficiency. However, a major challenge in the design of such systems is the loss of generality and flexibility that has limited their adoption to a small set of application domains that do not often change. Increased flexibility could be unlocked if accelerators were built from smaller dynamically composable blocks, but existing approaches are difficult to program and scale poorly. This project proposes a design flow to generate a templated System-on-Chip (Soc) with a composable accelerator system that can be physically instantiated for a range of computing platforms. Through a virtualization layer, collections of physical hardware blocks are exposed to software as virtual accelerators. To efficiently search the large design space of the SoC, new design space exploration techniques are under investigation.