EAGER: Globally-Analog Locally-Digital Computing for Accelerating Scientific Computation
EAGER: Globally-Analog Locally-Digital Computing for Accelerating Scientific Computation
批准号:
1840763
负责人:
Mingoo Seok
金额:
$30.0万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2018
资助国家:
美国
项目状态:
已结题
起止时间:
2018-10-01 至 2024-03-31
中文摘要
随着计算成本与性能之间的摩尔定律关系逐渐趋于稳定,以及对大规模计算需求的增加,迫切需要探索新的计算范式。在这个更大的场景中,该项目试图通过基于硅CMOS技术的新范式来解决扩展高性能科学计算应用的具体问题。这项高风险努力的成果将用于高级研究生和本科生的课堂上,从项目中获得的经验将使这些学生成为未来计算技术的新劳动力。用于解决大型科学问题的传统数字计算遇到了能源效率和计算延迟的问题。模拟计算有可能解决这些问题,但也有其他潜在的缺点,即对大型问题的可扩展性,噪声敏感性等。本项目将结合模拟和数字世界的优势,设计一个混合的模拟-数字硬件。在高性能科学计算问题中出现的非线性刚性微分方程组的解将作为第一个目标应用进行尝试。目标是首先利用模拟处理快速得到近似解决方案,然后通过无时钟数字硬件通过少量迭代改进解决方案。这样,在解决可扩展性问题的同时,可以更快地以更低的能耗将数字迭代收敛到最优解。该奖项反映了美国国家科学基金会的法定使命,并通过使用基金会的知识价值和更广泛的影响审查标准进行评估,被认为值得支持。
英文摘要
As Moore's law relationship between computing cost versus performance gradually plateaus, and the need for large scale computing is increases, novel computing paradigms need to be urgently explored. In this larger scenario, this project attempts to address the specific problem of scaling up high performance scientific computing applications via a novel paradigm that is based on silicon CMOS technologies. The results from this high-risk endeavor will be used in the classroom at an advanced graduate and undergraduate levels, with the experience gained from the project enabling these students to become the new workforce of future computing technologies. Conventional digital computing for solving large scientific problems runs into problems of energy efficiency and computing delays. Analog computing has the potential to solve these problems, but has other potential drawbacks namely that of scalability to large problems, noise susceptibility etc. This project will combine the benefits of analog and the digital world by designing a mixed analog-digital hardware. Solution of nonlinear stiff systems of differential equations arising in high performance scientific computing problems will be attempted as a first target application. The goal is to utilize analog processing to quickly get to an approximate solution first, and subsequently refine the solution by a small number of iterations via clock-less digital hardware. In this way, while the scalability issue is addressed and at the same time convergence of the digital iterations to an optimal solution is to be achieved faster and at the expense of lower energy.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
期刊论文(1)
专著(0)
科研奖励(0)
会议论文
INTIACC: A 32-bit Floating-Point Programmable Custom-ISA Accelerator for Solving Classes of Partial Differential Equations
INTIACC:用于求解偏微分方程类的 32 位浮点可编程自定义 ISA 加速器
DOI:
10.1109/esscirc55480.2022.9911441
发表时间:
2022
期刊:
ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC
影响因子:
--
作者:
[Huang, Paul Xuanyuanliang, Jang, Daniel, Tsividis, Yannis, Seok, Mingoo]
通讯作者:
Seok, Mingoo
PFI-RP: Next-Generation Microcontroller for the Era of Internet of Smart Things
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批准号:1919147
-
项目类别:Standard Grant
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资助金额:$55.0万
-
财政年份:2019
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负责人:Mingoo Seok
-
依托单位:
CAREER: Addressing Deepening Variability Challenges for Next-Generation Margin-Free VLSI Computing Platform Design
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批准号:1453142
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项目类别:Continuing Grant
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资助金额:$46.1万
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财政年份:2015
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负责人:Mingoo Seok
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依托单位:
海外基金