SHF: Medium: A Technology-Architecture-Algorithm Co-Design Exploration of Scalable Spiking Neural Networks (SNNs)

神经形态计算是一个鼓舞人心且雄心勃勃的问题，因为通过了解人类神经系统如何能够在不到20瓦的功率下高效工作，我们应该能够设计出能够解决像人类一样的复杂问题的智能计算系统。虽然人工神经网络(ANN)的精确度已经有了很大的进步，但对类似于生物系统的能源效率的追求仍然难以捉摸。因此，一种称为脉冲神经网络(SNNS)的方法引起了人们的极大兴趣，该方法使用生物启发的事件驱动的脉冲通信。然而，SNN的设计仍处于初级阶段，需要探索不同的神经形态计算模型、学习算法、硬件基础，并设计一种可扩展以满足严格功率预算的通信结构。本研究旨在探索可扩展、低功耗SNN的设计空间。这项研究的结果可能具有很高的价值，并将为设计智能机器的一系列相关研究铺平道路。在教育方面，计划包括让本科生和研究生参与这项新兴的研究，在那里他们将接触到计算机体系结构、电子设备、电路和应用方面的交叉主题。该项目将招募女性和少数民族学生参与工作。将继续开展几项广泛参与计算(BPC)的活动，如女孩夏令营和与教育部合作，让K-12学生接触到许多计算机科学领域。该项目寻求采取一种全面的方法，包括设计极低功率尖峰神经元和突触的设备/电路级创新，设计分层通信网络的架构级解决方案，提高SNN模型准确性的算法级优化，以及使用不同类别的应用对设计进行评估。建议的研究包括四个研究任务。首先，该团队计划调查使用基于磁隧道结(MTJ)的自旋电子器件的神经元设备基元的设计，这些自旋电子器件比现有技术的能效高一个数量级。其次，利用这些基于MTJ的神经元瓦片，将探索可扩展片上互连结构的设计空间。第三，研究重点是开发算法解决方案，以提高SNN的准确性，以及一种混合解决方案，以利用SNN和ANN的优势。最后，该计划包括开发一个模拟平台，以评估使用不同应用程序的不同设计的性能和能效。该奖项反映了NSF的法定使命，并通过使用基金会的智力优势和更广泛的影响审查标准进行评估，被认为值得支持。

Neuromorphic computing is an inspiring and ambitious problem because by understanding how the human nervous system is able to work efficiently using less than 20-Watts of power, we should be able to design intelligent computing systems that can solve complex problems like humans. While there have been significant advancements in the accuracy of artificial neural networks (ANNs), the quest for power efficiencies akin to biological systems remains elusive. Consequently, there has been significant interest in an approach called spiking neural networks (SNNs) which uses biologically-inspired event-driven spike communication. However, SNN design is still in its infancy, with need for exploring different neuromorphic computing models, learning algorithms, hardware substrates and designing a communication fabric that can scale to meet a strict power budget. This research seeks to explore the design space of scalable, low-power SNNs. The outcomes of this research could be highly valuable and will pave the way for an array of related research in designing intelligent machines. On the educational front, plans include the involvement of undergraduate and graduate students in this emerging research, where they will get exposure to cross-cutting topics in computer architecture, electronic devices, circuits, and applications. Female and minority students will be recruited to work in the project. Several Broadening Participation in Computing (BPC) activities such as summer camp for girls and collaboration with the Education Department to expose K-12 students to many areas of computer science will be pursued.The project seeks to take a comprehensive approach spanning device/circuit level innovations for designing extremely low-power spiking neurons and synapses, architectural level solutions for designing hierarchical communication networks, algorithm level optimizations to improve the accuracy of SNN models, and evaluation of the designs with different classes of applications. The proposed research consists of four research tasks. First, the team plans to investigate the design of neuron device primitives using Magnetic Tunnel Junction (MTJ)-based spintronic devices that are orders of magnitude more power efficient than existing technologies. Second, using these MTJ-based neuron tiles, the design space of a scalable on-chip interconnection fabric will be explored. Third, the research focuses on developing algorithmic solutions to enhance the accuracy of SNNs, and a hybrid solution to leverage the benefits of both SNNs and ANNs. Finally, the plan includes to develop a simulation platform to evaluate the performance and energy efficiency of different designs using diverse applications.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.