CNS Core:Small:A HW/SW Codesign Framework For Dynamic Composition of Disaggregated Hardware Systems Securely
CNS Core:Small:A HW/SW Codesign Framework For Dynamic Composition of Disaggregated Hardware Systems Securely
批准号:
2225882
负责人:
Venkatesh Akella
金额:
$59.99万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2022
资助国家:
美国
项目状态:
未结题
起止时间:
2022-10-01 至 2025-09-30
中文摘要
传统上,数据中心和高性能计算(HPC)设施通过添加额外的服务器来增加计算能力,但由于新兴的工作负载表现出非常高的峰值平均内存要求,这一点正变得越来越低效。此外,现代数据中心和HPC设施(处理器)的基本构建块正变得越来越专业化,包括用于矢量/张量处理、深度学习的专用硬件、不同的内存池,如DRAM、SRAM和NVRAM,以及特殊用途的互连。复制这样的处理器总是导致硬件既不是所有应用程序所需要的,也不是所有应用程序总是有用的。计算系统设计的分散方法可以通过选择和组成所需的硬件资源(例如,加速器、存储器)来克服这些低效,以满足特定工作流或应用的要求。该项目旨在通过解决系统安全和性能问题,使此类系统的设计和实施切实可行。拟议工作的智力价值在于开发了一个新的硬件、软件/协同设计框架,该框架基于虚拟远程内存、用于有效数据分层和一致性的对象级跟踪以及创建和执行基于硬件的可信执行环境的灵活机制。我们将使用基于系统级建模和使用ge5软件基础设施的模拟的严格评估计划来评估我们的解决方案。人工智能和机器学习预计将加速科学发现,并在应对21世纪的重大挑战方面发挥非常关键的作用,如气候变化、可持续性和具有广泛社会影响的药物/疫苗发现。该项目将能够对大规模机器学习模型进行培训,并对分散的硬件系统进行大规模数据分析,从而使其性能更好、成本效益更高。此外,GEM 5中的建模和仿真环境广泛影响了本项目以外的计算机体系结构和计算机系统研究人员。在这个项目中创建的模型将致力于上游的Gem5项目,以便其他研究人员可以使用这些模型并在我们的设计基础上进行构建。这些贡献将影响软件基础设施的可再生性和可持续性,并总体上推动计算机体系结构研究。该奖项反映了NSF的法定使命,并已通过使用基金会的智力优势和更广泛的影响审查标准进行评估,被认为值得支持。
英文摘要
Traditionally datacenters and high performance computing (HPC) facilities increase compute capacity by adding additional servers, which is increasingly becoming inefficient since emerging workloads exhibit very high peak to average memory requirements. Moreover, the fundamental building blocks of a modern data centers and HPC facilities (the processors) are becoming increasingly specialized with dedicated hardware for vector/tensor processing, deep learning, different memory pools such as DRAM, SRAM, and NVRAM, and special-purpose interconnect. Replicating such processors invariably results in hardware that is neither required nor useful all the time by all the applications. A disaggregated approach to computing system design can overcome these inefficiencies by selecting and composing the required hardware resources (e.g., accelerators, memory) to meet the requirements of a specific workflow or application. This project aims to make the design and implementation of such systems practical by addressing system security and performance. The intellectual merit of the proposed work lies in developing a new hardware software/codesign framework that is based on virtualized remote memory, object-level tracking for efficient data tiering and coherence, and flexible mechanisms to create and enforce hardware-based trusted execution environments. We will evaluate our solutions using a rigorous evaluation plan based on system-level modeling and simulation using the gem5 software infrastructure.Artificial intelligence and machine learning are expected to accelerate scientific discovery and play a very crucial role in addressing the grand challenges of the 21st century such as climate change, sustainability, and drug/vaccine discovery with broad societal impact. This project will enable training large scale machine learning models and perform large scale data analytics on disaggregated hardware systems which will allow them to be more performant and cost-effective. In addition, the modeling and simulation environment in gem5 broadly impacts computer architecture and computer systems researchers beyond this project. The models created in this project will be committed to the upstream gem5 project so that other researchers can use these models and build off of our designs. These contributions will impact the reproducibility and sustainability of this software infrastructure and advance computer architecture research in general.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
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IUCRC Planning Grant UC Davis: Center for Memory System Research (CMEMSYS)
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批准号:2310924
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项目类别:Standard Grant
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资助金额:$2.0万
-
财政年份:2023
-
负责人:Venkatesh Akella
-
依托单位:
CCF: Small: Improving Trace Based Simulation of On-Chip Networks
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批准号:1116897
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项目类别:Standard Grant
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资助金额:$44.88万
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财政年份:2011
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Programmable Architectures for Low Density Parity Check Codes
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资助金额:$0.0万
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CAREER: Making Asynchronous Design Practical
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批准号:9702302
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项目类别:Continuing Grant
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资助金额:$20.22万
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财政年份:1997
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负责人:Venkatesh Akella
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依托单位:
RIA: High-Level Synthesis of Self-Timed Circuits
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批准号:9308668
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项目类别:Standard Grant
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资助金额:$10.0万
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财政年份:1993
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负责人:Venkatesh Akella
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国内基金
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