CAREER: Near-Memory Datacenter Network

数据中心是当今数字世界的支柱，为所有日常云服务提供动力。在过去十年中，数据量的指数级增长导致了计算专业化，数据中心网络带宽利用率增加了100倍以上。但是，计算节点的网络数据传输路径保持不变。因此，当前的数据中心网络承受着多层软件堆栈、复杂的网络协议处理、频繁的数据移动和网络设备管理的开销。该项目的新颖之处在于利用硬件专门化和近数据处理来重新构建数据中心的网络。该项目的教育计划包括每年组织一次外展研讨会，向K-12教师传授计算机基础知识，让代表性不足的本科生和低收入家庭的学生参与研究，并将研究纳入高等教育课程。这些活动促进了高等教育机构的学生入学率，培养了深入了解计算机体系结构和系统基础的多元化学生，并能够在体系结构、网络和操作系统领域进行创新。该项目的影响是塑造数据中心网络的未来，并培养高素质的劳动力，以满足美国IT行业和学术界的需求。该项目旨在设计、实现和评估一个网络数据平面，利用光互连网络，将数据直接从机架顶部交换机端口传输到服务器的中央处理单元（CPU）缓存和内存模块。调查员扩展了CPU指令集架构（ISA），使用几个网络访问指令，使进程能够以最小的软件活动访问网络。内存访问指令将CPU和网络接口之间的通知卸载给硬件。研究者开发库和传输协议，利用提议的网络数据和控制平面，在不同服务器上运行的进程之间提供健壮的连接。最后，该项目探索了用于网络协议加速的特定领域近内存加速器的设计空间。潜在的变革性网络架构将使计算节点能够在裸机网络延迟数下有效地维持每秒兆位的连接。研究者使用研究结果和评估基础设施来促进家庭机构的计算机体系结构和系统教学法。该项目由计算机和通信基础（CCF）部门的软件和硬件基金会（SHF）核心研究计划和促进竞争研究的既定计划（EPSCoR）共同资助。该奖项反映了美国国家科学基金会的法定使命，并通过使用基金会的知识价值和更广泛的影响审查标准进行评估，被认为值得支持。

Datacenters are the backbone of today’s digital world that power all daily cloud services. Over the past decade, the exponential increase in the data volumes resulted in computing specialization and over a 100x increase in datacenter network bandwidth utilization. Nevertheless, the network data delivery path to the compute nodes remained unchanged. As such, the current datacenter network suffers from the overhead of the multi-layered software stack, complex network protocol processing, frequent data movement, and network device management. The project novelty is to leverage hardware specialization and near-data processing to re-architect a datacenter’s network. The project's educational plans include organizing yearly outreach workshops to educate K-12 teachers on computing fundamentals, involving underrepresented, undergraduate, and low-income students in research, and integrating research into the higher-education curriculum. Such activities boost student enrollment in higher-educational institutions, train diverse students who deeply understand computer architecture and systems fundamentals, and can innovate across architecture, networking, and operating systems fields. The project’s impacts are to shape the future of datacenter networking and educate a high-quality workforce to supply the needs of the US IT industry and academia.The project aims to design, implement, and evaluate a network data plane that delivers data directly from top-of-rack switch ports to the server’s Central Processing Unit (CPU) caches and memory modules, leveraging an optical interconnection network. The investigator extends the CPU Instruction Set Architecture (ISA) with several network access instructions that enable a process to access the network with minimal software activity. The memory access instructions offload the notification between the CPU and the network interfaces to the hardware. The investigator develops libraries and transport protocols that utilize the proposed network data and control plane to provide robust connectivity between processes running on different servers. Lastly, the project explores the design space of domain-specific near-memory accelerators for network protocol acceleration. The potentially transformative network architecture will enable compute nodes to efficiently sustain tera-bit-per-second connectivity with bare metal network latency numbers. The investigator uses the research findings and evaluation infrastructure to boost the home institution's computer architecture and systems pedagogy.This project is jointly funded by the Software and Hardware Foundations (SHF) core research program in the Computing and Communication Foundations (CCF) Division and the Established Program to Stimulate Competitive Research (EPSCoR).This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.