CAREER: SHF: Chimp: Algorithm-Hardware-Automation Co-Design Exploration of Real-Time Energy-Efficient Motion Planning

作为规划和决定机器人动作的基础和关键任务，运动规划在许多实际应用中被广泛需要，例如自动驾驶，仓库内包装处理，辅助手术等。目前，现代运动规划工作量的密集计算与通用硬件的支持不足之间存在越来越大的性能差距，需要高效的硬件加速来实现实时节能的高质量规划。本课题提出一种高效运动规划处理器的跨层协同设计框架Chimp。Chimp旨在开发一种新的设计范式，可以有效地将领域专业知识整合到基于学习的运动规划中，提高规划的可靠性和性能。该项目将显著提升现代自主系统的智能和耐用性，在自动驾驶、智能制造和智能医疗等多个领域增加经济机会。该项目将丰富大学的课程，促进少数族裔学生、本科生和K-12学生参与STEM领域。该项目旨在执行算法-硬件自动化协同探索，同时实现高规划性能和高硬件性能。它在三个层面上提供创新：(1)它开发了关键的设计原则，可以指导在复杂的物理世界环境和资源受限的情况下，将领域专业知识有效地整合到高性能的基于学习的运动规划器的构建中；(2)构建新的硬件原语，专门支持运动规划中独特的计算模式。提出了一系列数据流和微架构优化技术，提高了硬件效率和系统利用率；(3)对不同算法、架构和应用约束和预算的运动规划模型和硬件提供自动设计、映射和评估，提高了设计流程的效率，更好地探索了设计空间。软件和硬件的实现和评估将在机器人模拟器、现场可编程门阵列板和不同工作环境下的真实世界机器人上进行。该项目的研究成果将推动多个技术领域的发展，如计算硬件、机器人和机器学习。该奖项反映了美国国家科学基金会的法定使命，并通过使用基金会的知识价值和更广泛的影响审查标准进行评估，被认为值得支持。

As the fundamental and critical robotic task for planning and deciding the actions of robots, motion planning is widely desired in many real-world applications, such as autonomous driving, in-warehouse package handling, assisted surgery etc. To date, there exists an increasing performance gap between the intensive computation of modern motion planning workloads and the insufficient support from general-purpose hardware, calling for efficient hardware acceleration to realize real-time energy-efficient high-quality planning. This project proposes Chimp, a cross-layer co-design framework for highly efficient motion planning processor. Chimp aims to develop a new design paradigm that can efficiently integrate domain expertise into learning-based motion planning, improving the planning reliability and performance. This project will significantly promote the intelligence and durability of modern autonomous systems, enhancing the economic opportunities in many fields such as autonomous driving, smart manufacturing, and intelligent healthcare. This project will enrich the curriculum of the university and promote the involvement of students from underrepresented minority groups, undergraduates and K-12 students in the STEM fields.This project aims to perform algorithm-hardware-automation co-exploration to simultaneously enable high planning performance and high hardware performance. It delivers innovations at three levels: (1) it develops key design principles that can guide the efficient integration of domain expertise to the construction of high-performance learning-based motion planners in complex physical-world settings and resource-constrained scenarios; (2) it builds new hardware primitives that specifically support the unique computing patterns in motion planning. It also proposes a series of optimization techniques for dataflow and microarchitecture, improving hardware efficiency and system utilization; and (3) it offers automatic design, mapping and evaluation of the motion planning model and hardware with different algorithmic, architectural and application constraints and budgets, enabling the improved efficiency of design flow and better exploration of design space. Both software and hardware implementation and evaluation will be performed on robotic simulators, Field-programmable gate array boards and real-world robots in different working environments. The research outcomes of this project will advance various technical fields, such as computing hardware, robotics and machine learning.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.