Integrated Memristor-Based Computer Architectures

近年来，记忆器件的发展取得了重大进展，因此基于该技术的新后台存储系统的商业化已经开始。在目前的研究中，忆阻器件仅用于存储数据，而不用于CPU内部的数据处理。然而，从能量的角度来看，基于忆阻器的非易失性，忆阻器件也应该对数据处理感兴趣，特别是对于使用易失性电源的物联网设备中的cpu。因此，这个项目的目的是在现代计算机体系结构中使用忆阻器技术；特别是在嵌入式应用的CPU中集成忆阻器件。为了进一步降低能耗，还可以使用在单个忆阻器单元中存储多个比特的能力来实现初级逻辑，这需要在忆阻寄存器中存储多个比特。Tenary逻辑将导致冗余的数字表示，这允许在与单词长度无关的恒定时间内执行加法。这也会降低功耗。由于忆阻器技术与标准CMOS处理的兼容性，忆阻器的集成将通过后处理芯片成为可能。然而，目前记忆器件的自动化和工具辅助设计流程，特别是数字设计，是不可用的。相反，必须开发专用的混合信号电路，以便在数字世界中也能使用忆阻器。对于时态逻辑的实现，必须解决模拟域和数字域之间不断转换在多大程度上有意义的问题。因此，除了集成忆阻器之外，该项目的另一个目标是开发利用忆阻器件的初级处理器架构。为了实现这样的架构，例如，可以使用基本混合信号块。因此，忆阻器将不仅用作纯存储设备，而且将成为CPU内数据处理的一部分。该计算机架构将作为原型集成电路实现并进行验证。忆阻器器件的集成是通过特殊的BEOL处理完成的，其中忆阻器将被放置在芯片的顶层。使用适当的基准，将对开发的体系结构进行定性和定量评估，以评估记忆电阻器在现代cpu中数据处理的有用性。最后的评估将导致确定设计建筑的可能应用领域。

In recent years, in the development of memristive devices significant progress has been attained, so that the commercialization of new background memory systems based on this technology has already begun. In present research memristive devices are only used for storing data but not for the processing of data inside a CPU. However, from an energy point of view and based on the memristors non-volatile behavior, memristive devices should also be of interest for data processing, especially for CPUs in IoT-devices utilizing a volatile power supply. Therefore, the aim of this project is to use memristor technology in modern computer architectures; especially for the integration of memristive devices in a CPU for embedded applications. For a further reduction of the energy consumption also the ability of storing more than one bit in a single memristor cell can be used to enable the realization of tenary logic, which requires multi-bit-storage in a memristive register. Tenary logic will result in a redundant number representation, which allows to execute an adding during a constant time independent of the word length. This also results in a decreased power consumption.Due to the compatibility of the memristors technology with standard CMOS processing, an integration of memristors will be possible by postprocessing the chip. However, currently an automated and tool-aided design flow for memristive devices, especially for digital designs, is not available. Instead, dedicated mixed signal circuits have to be developed to enable the use of memristors also in the digital world. Regarding the realization of the tenary logic the problem has to be solved to what extent ceaseless conversions between the analog and the digital domain make sense. Therefore, in addition to the integration of memristors a further goal of this project is the development of a tenary processor architecture utilizing memristive devices. For the realization of such an architecture, e.g., basic mixed-signal blocks can be used. Consequently, memristors will not only be used as pure storage devices but will be part of the data processing within a CPU.The computer architectures will be realized as a prototype IC and verified. The integration of the memristive devices is done through a special BEOL processing in which the memristors will be placed at the top chip layer. Using appropriate benchmarks a qualitative and quantitative evaluation of the developed architectures will be performed to assess the usefulness of memristors for data processing in modern CPUs. A final evaluation shall result in the identification of possible applications fields of the designed architecture.