Low Power Logic Circuits by Energy Packet Transfer Method
Low Power Logic Circuits by Energy Packet Transfer Method
批准号:
05805033
负责人:
ASADA Kunihiro
金额:
$1.28万
依托单位:
依托单位国家:
日本
项目类别:
Grant-in-Aid for General Scientific Research (C)
财政年份:
1993
资助国家:
日本
项目状态:
已结题
起止时间:
1993 至 1994
中文摘要
在本课题中,我们首先研究了MOSFET栅极能量消耗的下界。这里我们在传统的渐变沟道近似中引入了一个新的项,它考虑了横向电场的影响,以改进模型。基于该模型,我们实现了一个数值分析程序,并将SOI器件作为样品在超快开关下进行了分析。结果表明,提供给栅电极的总能量中约有30%被器件消耗,其余的能量理论上可以通过电荷回收的概念回收。接下来,我们研究了两种能量填充转移电路:CR型和LCR型。前者由电容和电阻组成,其中沿逻辑路径衰减的信号由读出放大器恢复。后者使用了额外的电感,L,从而使能量转移的效率更高。通过数值计算得出了两种电路的最优电路参数条件,提出并评价了能量传递法新电路的可行性和局限性。
英文摘要
In the present project we first studied on the lower bound of the energy consumed at the gate electrode of MOSFETs. Here we introduced a new term in the conventional gradual-channel approximation, which takes into account the lateral electric field in order to improve the model. Based on the new model we inplemented a numerical analysis program and analyzed SOI devices as samles under ultra-fast switching operation. Results showed that about 30% of the total energy supplied to the gate electrode is really consumed by the devices and the rest can be theoretically recovered by the charge recycle concept.Next we investigated two kinds of energy-packed transfer circuits ; CR type and LCR type. The former is composed of Capacitors and Resisters ; where signals attenuated along logic paths are restored by sense amplifiers. The latter uses additional inductors, L,so as to make the efficiency of energy transfer higher. We numerically found the optimal conditions of the circuit parameters for the both circuits.In conclusion, we proposed and evaluated new circuitry for energy transfer method and showed its possibility and limits.
期刊论文(6)
专著(0)
科研奖励(0)
会议论文
Kunihiro Asada and Mike Lee.: "Ultimate Lower Bound of Power for MOS Integrated Circuits and Their Applications" IEICE Trans. Electron.Vol.E77-C,No.7, July. 61-66 (1994)
Kunihiro Asada 和 Mike Lee:“MOS 集成电路及其应用的终极功耗”IEICE Trans。
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通讯作者:
K. Asada M. Lee: "Ultimate Lower Bound of Power for MOS Intergrated Circuits and Their Applications" IEICE TRANS. ELECTRON.E77-C. 61-66 (1994)
K. Asada M. Lee:“MOS 集成电路及其应用的终极功率下限”IEICE TRANS。
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Smart Image Capturing and Pre-processing
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批准号:12044205
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项目类别:Grant-in-Aid for Scientific Research on Priority Areas
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资助金额:$128.96万
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财政年份:2001
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负责人:ASADA Kunihiro
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依托单位:
Research on Intelligent Design Verification of VLSIs
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批准号:10355014
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项目类别:Grant-in-Aid for Scientific Research (A)
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资助金额:$20.54万
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财政年份:1998
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负责人:ASADA Kunihiro
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依托单位:
Research on Processor architecture based on pseudo-asynchronous concept
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批准号:10450132
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项目类别:Grant-in-Aid for Scientific Research (B)
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资助金额:$8.83万
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财政年份:1998
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负责人:ASADA Kunihiro
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依托单位:
Instantaneous 2-D data processing system
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批准号:07248104
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项目类别:Grant-in-Aid for Scientific Research on Priority Areas
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资助金额:$87.3万
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财政年份:1995
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负责人:ASADA Kunihiro
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依托单位:
Integrated Circuit with Semantic Checking Mechanism
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批准号:02650258
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项目类别:Grant-in-Aid for General Scientific Research (C)
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资助金额:$1.22万
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财政年份:1990
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负责人:ASADA Kunihiro
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依托单位: