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Instantaneous 2-D data processing system

Instantaneous 2-D data processing system
瞬时二维数据处理系统
批准号:
07248104
负责人:
ASADA Kunihiro
金额:
$87.3万
依托单位:
依托单位国家:
日本
项目类别:
Grant-in-Aid for Scientific Research on Priority Areas
财政年份:
1995
资助国家:
日本
项目状态:
已结题
起止时间:
1995 至 1998

项目摘要

项目成果

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中文摘要
翻译
通过在芯片上集成成像仪和并行处理元件,研究了可与生物视觉系统相媲美的图像数据瞬时处理/响应系统的实现方法。取得了以下成果。【视觉反馈控制系统】为了实现瞬时视觉处理和控制,我们设计了一种集成光电探测器和数字通用处理元件的芯片。16 × 16像素和处理元件集成在5mm × 5mm芯片上,工作频率为100MHz/600mW。为了成功演示基于所开发的视觉芯片的视觉反馈系统,还实现了一种用于视觉芯片的控制器及其编程系统。【数据压缩的高质量成像仪】为了同时实现高质量成像仪和抑制数据带宽,我们成功地将图像处理功能集成到成像仪中。在芯片上连续监控像素强度的变化,从而只对需要更新的像素产生最小的输出图像数据。实现了一个128 × 128的成像仪来演示该性能。我们还实现了一个64 × 64可变特殊分辨率成像仪,它可以根据目标物体自适应地改变其分辨率。它与生物视网膜有相似之处。[运动物体跟踪系统]为了对运动物体的运动矢量进行瞬时检测,我们开发了一种利用物体的二值图像/二值轮廓的分层块访问成像仪。该传感器可以一次访问一定体积的像素,从而通过比较芯片上连续的图像帧来检测物体的运动方向。【自适应视觉】为了模拟生物视觉系统的适应性,我们设计了一种具有空间导数计算和平滑能力的一维人工硅视网膜。它还具有在实时操作中捕捉边缘位置的能力。我们研究了实现高性能成像仪所需的小于0.1um特征尺寸的缩放器件特性,并考虑了定量量子效应。此外,我们还成功开发了采用晶圆堆叠法的三维器件集成技术。可实现图像处理电路等三维集成。少
英文摘要
By means of integration of an imager and parallel processing elements on a chip, we have studied on realization methods of instantaneous processing/response system of image data that is comparable to a biological vision system. The following results have been achieved.[Visual feedback control system] For the instantaneous visual processing and control, we have designed a chip integrating photo detectors and digital general purpose processing elements. 16 x 16 pixels with processing elements has been integrated on a 5mm x 5mm chip, that operates 100MHz/600mW. A controller for the vision chip and its programming system has also implemented for successful demonstration of the visual feedback system based on the developed vision chip.[High quality imager with data compression] For simultaneous realization of high quality imager and suppression of data bandwidth, we have successfully integrated image-processing functions into an imager. The pixel intensity variation is continuously monitore … More d on the chip, so as to generate minimal output image data only for pixels that need to update. A 128 x 128 imager has been realized to demonstrate the performance. We have also realized a 64x 64 variable special resolution imager, which adaptively changes its resolution depending on target objects. It has a similarity to that of the biological retina.[Tracking system of moving objects] For instantaneous detection of motion vectors of moving objects, we have developed a hierarchical block access imager utilizing the binary image/binary outline of objects. This sensor can access a volume of pixels at a time, so as to detect moving directions of objects comparing the successive image frames on a chip.[Adaptive vision] For simulating the adaptability of biological vision system, we have designed a 1-D artificial silicon retina that has capabilities of spatial derivative calculation and smoothing. It has also a capability to catch edge places in real time operation.[3D-scaled device integration] We have studied on scaled device characteristics less than 0.1um feature size requested for implementing high performance imager, accounting quantitative quantum effects. Also we have successfully developed 3-D device integration technologies by means of a wafer stacking method. It can realize 3D-integration such as imager-on-processing circuits. Less
期刊论文(230)
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会议论文
M. Ishikawa: "Robot Sensors with Parallel Processing capabilities" International Journal of the Japan Sociery for Precision Engineering. 29. 201-204 (1995)
M. Ishikawa:“具有并行处理能力的机器人传感器”日本精密工程学会国际期刊。
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K.Asada: "Image sensors with flexible access methods to pixels for adaptive spatial and tune resolution"International Symposium on Future of Intellectual Integrated Electronics. 49-62 (1999)
K.Asada:“具有灵活的像素访问方法的图像传感器,可实现自适应空间和调谐分辨率”智能集成电子未来国际研讨会。
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共 111 条
    Smart Image Capturing and Pre-processing
    • 批准号:
      12044205
    • 项目类别:
      Grant-in-Aid for Scientific Research on Priority Areas
    • 资助金额:
      $128.96万
    • 财政年份:
      2001
    • 负责人:
      ASADA Kunihiro
    • 依托单位:
    Research on Intelligent Design Verification of VLSIs
    • 批准号:
      10355014
    • 项目类别:
      Grant-in-Aid for Scientific Research (A)
    • 资助金额:
      $20.54万
    • 财政年份:
      1998
    • 负责人:
      ASADA Kunihiro
    • 依托单位:
    Research on Processor architecture based on pseudo-asynchronous concept
    • 批准号:
      10450132
    • 项目类别:
      Grant-in-Aid for Scientific Research (B)
    • 资助金额:
      $8.83万
    • 财政年份:
      1998
    • 负责人:
      ASADA Kunihiro
    • 依托单位:
    Low Power Logic Circuits by Energy Packet Transfer Method
    • 批准号:
      05805033
    • 项目类别:
      Grant-in-Aid for General Scientific Research (C)
    • 资助金额:
      $1.28万
    • 财政年份:
      1993
    • 负责人:
      ASADA Kunihiro
    • 依托单位:
    海外基金