Integrated Circuit with Semantic Checking Mechanism

作为开发集成电路语义检查机制的第一步，本文对一个VLSI控制系统进行了实例研究；倒立摆控制系统。在此，除了众所周知的直立控制算法外，还引入了一些启发式规则来避免不合理的控制信号的产生，例如干扰稳定直立的信号。这些规则已经使用故障模拟器进行了测试，该故障模拟器是专门为本研究在工作站上开发的。通过仿真评价，从启发式规则命中（或检测）故障情况的有效性角度对启发式规则进行打分。通过对这些启发式规则的引入和故障仿真筛选的迭代，得到了一些有效的规则，即使在频繁的间歇故障中也能使倒立摆保持直立。接下来，从硬件开销方面对上述基于规则的语义检查机制进行了评估；成本方面，通过实际设计控制器在寄存器中传输电平的描述。在这里，比较了两种方法；(1)独立实现，普通控制器元件电路和语义检查电路相互分离；(2)合并实现，普通控制器元件电路和语义检查电路作为公共硬件电路实现。显然，方法(1)更有效，但研究结果表明，方法(2)在间歇故障条件下也是有效的。硬件开销取决于规则集，并从大约20的案例研究中建立了一个系统的方法来设计具有语义检查机制的超大规模集成电路，尽管该方法的某些部分仍然是启发式的。综上所述，本文的研究证实了具有语义检测机制的超大规模集成电路的有效性和真实性，为未来的超可靠超大规模集成电路系统提供了理论依据。

As the first step in order to develop a semantic checking mechanism in integrated circuits, case study has been carried out for a VLSI control system ; an inverted pendulum control system. Here, in addition to the well known control algorithm for upstanding, several heuristic rules were introduced to avoid unreasonable control signal generation such like a signal toward disturbing stable upstanding. These rules have been tested using a fault simulator, which has been developed specifically to this studv on work station. Through the evaluation by simulation, heuristic rules have been scored from a view point of effectivity for hitting(or detecting)faulty situation. After iterating these heuristic rule introduction and screening by fault simulation, a few effective rules has been obtained, which can keep the inverted pendulum upstanding, even in the frequent intermittent fault. Next, the above mentioned rule based semantic checking mechanism has been evaluated in terms of hardware overhead ; cost, by actually designing controller in a register transfer level description. Here, two approaches were compared ; (1)separate implementation where normal controller element circuits and semantic checking circuits are mutually separated, and(2)merged implementation where normal element circuits and semantic checking circuits are realized as common hardware circuits. Apparently the approach(1)is more effective for this purpose but the research results showed that the approach(2)is also effective under intermittent fault condition. The hardware overhead depends on the rule set and from about 20 Based on the case study a systematic methodology toward designing VLSI's with semantic checking mechanism has been established, although some part in the methodology is still heuristic. As a conclusion, the effectiveness and reality of VLSI's with semantic checking mechanism have been confirmed through this study, which will contribute to the future ultra-reliable VLSI systems.