Studies on Test Architecture for Test Data Compression / Decompression

2003年，首先分析了使用可变长码的压缩算法与测试应用的关系，然后在此基础上，对测试数据的压缩和解压缩进行了研究。在此基础上，我们提出了一种带缓冲区的解压缩器模型来应用压缩后的测试数据。该模型在测试应用中存在一定的局限性。此外，我们提出了一个测试向量重排算法，以最小化解压模型的缓冲区大小。另一方面，提出了一种基于霍夫曼编码的响应压缩编码方法。该编码方法保证了零混叠，且与故障模型和被测电路结构无关。2004年，根据上述分析，我们提出了一种新的基于霍夫曼的编码方法，在给定的测试环境下，实现了小的测试应用时间。所提出的编码方法调整压缩比和码字的长度，以测试环境。我们还提出了一个具有成本效益的测试生成方法，高度可压缩的测试数据，同时保持生成的测试集的数量少。此外，我们开始讨论使用可重构VLSI的解压缩器的灵活性。在2005年，我们发展了去年的讨论，并介绍了一种嵌入式解压缩器，可根据使用的编码算法和给定的测试数据进行重构。它的可重构性可以克服传统解压缩器的缺点，保持高压缩比。此外，我们提出了一个架构的可重构解压缩器的四个可变长度的编码。在所提出的体系结构中，四个编码的共同功能被实现为固定（或不可重构）的组件，以减少配置数据，这是存储在ATE和发送到CUT。

We researched test data compression and decompression schemes for VLSI testing in terms of usefulness.In 2003, first, we analyzed a relationship between compression algorithms using variable-length codes and test application. Based on this analysis, we proposed a model of decompressors with buffer for applying compressed test data. This model can raise some limitations on test application. In addition, we proposed a test vector reordering algorithm to minimize the size of the buffer on the decompressor model. On the other hand, we proposed a response compression coding method based on Huffman coding. The proposed coding method guarantees zero-aliasing and it is independent of the fault model and the structure of a circuit-under-test.In 2004, according to the above analysis, we proposed a new Huffman-based coding method for achieving small test application time in a given test environment. The proposed coding method adjusts both of the compression ratio and the length of the cord words to the test environment. We also proposed a cost-effective test generation method for highly compressible test data while keeping the number of generated test sets small. Moreover, we began to discuss flexibility of decompressors using reconfigurable VLSI.In 2005, we developed the last year's discussion, and introduced an embedded decompressor that is reconfigurable according to the used coding algorithms and a given test data. Its reconfigurability can overcome the drawbacks of conventional decompressors with keeping high compression ratio. Moreover, we propose an architecture of reconfigurable decompressors for four variable-length codings. In the proposed architecture, the common functions for four codings are implemented as fixed (or non-reconfigurable) components so as to reduce the configuration data, which is stored on an ATE and sent to a CUT.