Vertical GaN Transistors on Silicon Substrates

氮化镓（GaN）是一种宽带隙半导体材料，在电力电子领域具有强大的潜力，在过去几年中，横向GaN晶体管在某些低压应用中占据主导地位。垂直GaN晶体管表现出比横向器件更好的效率和关态阻断能力，非常适合高压应用，尽管目前仅限于昂贵且不可持续的原生GaN衬底，阻碍了商业化。在硅（Si）衬底上实现垂直GaN晶体管（GaN-on-Si）将减少由于一系列大众市场部门效率低下而导致的碳排放，尽管必须首先克服重大的技术挑战。通过使用定制设计的晶圆材料和仔细考虑的器件设计来制造和表征器件，将实现器件性能的优化和对垂直GaN on Si功率晶体管基本物理特性的深入理解。将使用TCAD模拟产生多种设计，初步结果已经显示了使用全垂直（即非准垂直）设计的重要性。器件将是完全垂直的，通过使用局部衬底去除和随后蚀刻所需外延层（即成核、应变消除和子漂移层）的后端接触到“掩埋接触层”来实现，将使用泵启动项目的材料进行开发。将选择器件设计以最大限度地利用晶片材料，从而为改进后续模拟提供最有价值的信息。器械将在布里斯托大学洁净室中制造，并在电气表征实验室中进行测试。将实施测试结构，以确定后端接触技术的有效性，以及相关制造工艺的公差，使用接触轮廓测量和扫描电子显微镜进行分析。全垂直肖特基二极管的电气特性将用于比较泄漏，功率密度和击穿特性。布里斯托大学（EFISHG）开发的光学技术将用于测量设备内的内部电场，结合电气测量和TCAD模拟，以提供设备的整体模型。

Gallium nitride (GaN) is a wide bandgap semiconductor material with strong potential in power electronics, with lateral GaN transistors becoming dominant in certain low-voltage applications in the last few years. Vertical GaN transistors demonstrate even better efficiency and off-state blocking capability than lateral devices and are ideally suited for high voltage applications, although are currently confined to expensive and unsustainable native GaN substrates, preventing commercialization. Implementation of vertical GaN transistors on silicon (Si) substrates (GaN-on-Si) will enable reduced carbon emissions due to inefficiency across a range of mass market sectors, although significant technical challenges must first be overcome. Optimisation of device performance and advanced understanding of underlying physics of vertical GaN-on-Si power transistors will be achieved through the fabrication and characterization of devices using bespoke designed wafer material and carefully considered device designs. Multiple designs will be produced using TCAD simulation, with initial results already showing the importance of using a fully-vertical (i.e. not quasi-vertical) design. Devices will be fully-vertical, achieved through back-end contact to the 'buried contact layer' using local substrate removal and subsequent etching of required epitaxial layers (i.e. nucleation, strain relief and sub-drift layers), to be developed using the material from the pump-priming project. Device designs will be selected to maximize usage of the wafer material so as to provide the most valuable information for refining subsequent simulations. Devices will be fabricated in the University of Bristol cleanroom, and tested in the electrical characterization lab. Test structures will be implemented to ascertain the effectiveness of back-end contact techniques, and the tolerance of the associated fabrication processes, to be analysed using contact profilometry and scanning electron microscopy. Electrical characterization of fully-vertical Schottky diodes will be used to compare leakage, power density and breakdown characteristics. An optical technique developed at the University of Bristol (EFISHG) will be used to measure internal electric fields within the device, combining with electrical measurement and TCAD simulations to provide a holistic model of the device.