Vertical GaN-on-Si membrane power transistors: Efficient power electronics for mass-market applications (VertiGaN)`

该项目旨在实现击穿电压超过1200v的垂直氮化镓硅（GaN-on-Si）晶体管。电力电子在配电和运输等应用中至关重要，电力电子系统的低效率估计占全球碳排放量的20%。此外，新兴的低碳技术，包括电动汽车和可再生能源发电，需要比现有的硅基解决方案有重大改进的电力电子设备。氮化镓是一种可替代硅的宽禁带半导体，具有优越的电力电子材料性能。商业上可用的横向GaN晶体管具有良好的功率性能，但由于高导通电阻和大芯片面积，通常不适合bb0 1000 V的应用。垂直GaN晶体管（电流流入芯片的平面，而不是沿着表面）在电压超过1000 V时，比目前在电力电子中占主导地位的si基器件提供了效率和功率密度的逐步增加。垂直GaN器件的大规模商业化目前受到昂贵和不可持续的GaN大块基板的要求的抑制。本文提出的向可持续硅衬底的转移，成本降低了1000倍，需要管理相关的材料缺陷，通过实施新的器件结构和优化材料生长过程来实现。演示的垂直GaN on Si晶体管击穿电压为>200v（即器件发生故障的电压），比之前的尝试中的< 600v有所改进，将使GaN材料在>1000v的新兴大众市场应用中得到开发，解锁新的应用，并使包括电动汽车和配电在内的下一代电力电子系统中的碳排放减少。通过改善有源器件漂移区域的材料质量，可以提高垂直GaN-on-Si晶体管的击穿电压。这种新型结构将使用外延嵌入的n+GaN漏极接触层，以促进漏极凹槽膜器件结构，消除有源器件区域的低质量材料。同时，外延生长技术的优化将生产出总厚度增加、位错密度和背景杂质水平降低的GaN-on-Si材料。漏极凹槽GaN-on-Si膜结构将与finFET器件拓扑集成，显示GaN-on-GaN可承受工作电压>1200 V，从而使晶体管具有增强的非状态阻塞和状态电子传输特性。在工业界的密切合作和大力支持下，该开发工作计划将使我们能够彻底探索决定GaN-on-Si垂直击穿的基本物理原理，并提高设备性能，以实现大规模商业化所需的性能。通过可靠性/稳定性测试和多物理场建模进行全面的失效分析，将进一步了解GaN-on-Si材料体系和商业潜力。技术演示将优化定位，与下一代制造链和测试系统集成，从而产生最大的商业影响。这将通过与项目指导委员会的定期磋商来实现，该委员会由英国电力电子材料、设备和系统制造商、学者和英国政府政策影响者组成。使用设计套件向系统设计师和制造商推广该技术的优势，将确保最大限度地吸收和识别其他应用领域，实现GaN器件的大规模使用，并减少因电力电子设备效率低下而产生的碳排放。

This project aims to realize transformative vertical gallium nitride-on-silicon (GaN-on-Si) transistors with breakdown voltage in excess of 1200 V. Power electronics is essential in applications including power distribution and transportation, with inefficiency of power electronic systems estimated to account for 20% of global carbon emissions. Furthermore, emerging low-carbon technologies, including electric vehicles and renewable energy generation, require power electronic devices with significant improvements over existing Si based solutions. GaN is a wide bandgap semiconductor alternative to Si, with superior power electronic material properties. Commercially-available lateral GaN transistors show good power performance, but are generally unsuitable for applications >1000 V due to high on resistance and large chip area. Vertical GaN transistors (where current flows into the plane of the chip, rather than along the surface) offer a step-increase in efficiency and power density over Si-based devices currently dominant in power electronics at voltages exceeding 1000 V. Large-scale commercialisation of vertical GaN devices is currently inhibited by the requirement for expensive and unsustainable GaN bulk substrates. Transfer to sustainable Si substrates as proposed here, with a cost reduction of >1000x, requires management of associated material defects, to be achieved in this work through of implementation of novel device structures and optimisation of material growth processes. Demonstration of vertical GaN on Si transistors with breakdown voltage of >1200 V (i.e. voltage at which device failure occurs), improved from <600 V in previous attempts, will enable exploitation of the outstanding GaN material properties in emerging mass market applications at >1000 V, unlocking new applications and enabling reduced carbon emissions in next-generation power electronic systems including electric vehicles and power distribution. Breakdown voltage in vertical GaN-on-Si transistors will be increased through improvement of material quality in the active device drift region. The novel structure will use an epitaxially-embedded n+GaN drain contact layer to facilitate a drain-recessed membrane device architecture, eliminating low-quality material from the active device region. In parallel, optimisation of epitaxial growth techniques will produce GaN-on-Si material with increased total thickness and a reduction in both dislocation density and background impurity levels. Drain-recessed GaN-on-Si membrane structures will then be integrated with finFET device topologies, shown to withstand operation voltages >1200 V in GaN-on-GaN, resulting in transistors with enhanced off-state blocking and on-state electron transport characteristics. The development workplan, in close collaboration and with strong support by industry, will enable both a thorough exploration of the underlying physics determining vertical breakdown in GaN-on-Si and improvements in device performance toward that required for large-scale commercialisation. Comprehensive failure analysis via reliability/stability testing and multiphysics modelling will provide further understanding of the GaN-on-Si material system and commercial potential.Technology demonstrators will be optimally positioned for integration with next-generation manufacturing chains and testing systems, ensuing maximum commercial impact. This will be achieved through regular consultation with the Project Steering Committee, consisting of UK-based manufacturers of power electronic materials, devices and systems, as well as academics and a prominent UK government policy influencer. The use of a Design Kit to promote the benefits of the technology to system designers and manufacturers will ensure maximum uptake and identification of additional application areas, toward achieving wide-scale use of GaN devices and an associated reduction in carbon emissions from inefficiency of power electronics.