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Efficient architectures for wireless communications

Efficient architectures for wireless communications
高效的无线通信架构
批准号:
42066-2007
负责人:
Fortier, Paul
金额:
$2.1万
依托单位:
依托单位国家:
加拿大
项目类别:
Discovery Grants Program - Individual
财政年份:
2010
资助国家:
加拿大
项目状态:
已结题
起止时间:
2010-01-01 至 2011-12-31

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中文摘要
翻译
多载波(MC)调制存在于无线通信系统的几个标准(例如,802.11、802.16)中,并且正在考虑用于未来的宽带移动系统。在这个方案中,我们将研究MC调制和低密度奇偶校验码(LDPC)的组合,特别是从高效VLSI实现的角度。LDPC码已经并入或正在考虑并入几个无线通信标准中。针对各种传输条件提出了新的编码。这项研究的目标是继续我们对高度并行结构的研究,并研究如何将这些结构与MC调制有效地结合起来。特别感兴趣的是峰均功率比(PAPR)、自适应调制以及可变速率和速率兼容编码的考虑。为了实现这些目标,我们将开发新的LDPC码架构,适合高效实现(例如使用少量资源和快速),并能够实现未来宽带接入系统的数据速率目标(即100‘S Mbps到Gbps,取决于移动性)。同时,我们还将寻找能够提供良好的性能和复杂度折衷的新的LDPC码。我们将进行广泛的分析研究和计算机模拟。我们的一些模拟将使用“硬件在环”技术来完成,以减少模拟时间并考虑实现问题。例如,我们实验室现有的现场可编程门阵列(现场可编程门阵列)电路将被广泛使用。该项目将提供有用的成果,可以转移到加拿大的行业,帮助加拿大成为定义未来无线系统的主要参与者。宽带无线系统将在未来几年普及,培养高素质的这方面的人才是非常重要的。
英文摘要
Multicarrier (MC) modulation is present in several standards for wireless communications systems (e.g. 802.11, 802.16) and is being considered for future wideband mobile systems. In this proposal, we will study the combination of MC modulation and low density parity check (LDPC) codes, particularly from an efficient VLSI implementation point of view. LDPC codes have been incorporated or are being considered for incorporation in several wireless communications standards. New codes are being proposed for various transmission conditions. The objectives of the proposed research are to continue our investigation on highly parallel structures and study how these can be combined efficiently with MC modulations. Of particular interest are the considerations of peak-to-average-power-ratio (PAPR), adaptive modulation and variable-rate and rate-compatible codes. To achieve these objectives, we will develop new architectures for LDPC codes, suitable for efficient implementations (e.g. using a small amount of resources and being fast) and able to achieve the data rate goals of future wideband access systems (i.e. 100's of Mbps to Gbps, depending on mobility). In parallel, we will also search for new LDPC codes that can offer good performance-complexity trade-offs. We will conduct extensive analytical studies and computer simulations. Some of our simulations will be done using "hardware-in-the-loop" techniques in order to diminish simulation time and consider implementation issues. For example, field programmable gate arrays (FPGA) circuits available in our laboratory, will be extensively used. This project will provide useful results that can be transferred to Canadian industry, helping Canada to be a major player in defining future wireless systems. Wideband wireless systems will be prevalent in the coming years and it is very important to train highly qualified personnel in this area.
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Nouvelles architectures pour les systèmes sans fil du futur
  • 批准号:
    RGPIN-2018-06159
  • 项目类别:
    Discovery Grants Program - Individual
  • 资助金额:
    $4.08万
  • 财政年份:
    2022
  • 负责人:
    Fortier, Paul
  • 依托单位:
Nouvelles architectures pour les systèmes sans fil du futur
  • 批准号:
    RGPIN-2018-06159
  • 项目类别:
    Discovery Grants Program - Individual
  • 资助金额:
    $2.04万
  • 财政年份:
    2021
  • 负责人:
    Fortier, Paul
  • 依托单位:
Nouvelles architectures pour les systèmes sans fil du futur
  • 批准号:
    RGPIN-2018-06159
  • 项目类别:
    Discovery Grants Program - Individual
  • 资助金额:
    $2.04万
  • 财政年份:
    2020
  • 负责人:
    Fortier, Paul
  • 依托单位:
Nouvelles architectures pour les systèmes sans fil du futur
  • 批准号:
    RGPIN-2018-06159
  • 项目类别:
    Discovery Grants Program - Individual
  • 资助金额:
    $2.04万
  • 财政年份:
    2019
  • 负责人:
    Fortier, Paul
  • 依托单位:
海外基金