Architecture and Automation Techniques for Resilient Computer Systems

自现代计算出现以来，减轻计算机系统故障一直是一个挑战，但许多因素现在正在融合，使得弹性（系统在由于制造缺陷或现场故障而出现故障时的操作能力）现在是一流的设计约束。半导体规模化使得计算机进入我们生活的方方面面成为可能。缩放使得集成电路的导线和晶体管越来越微型化，不幸的是，这也使得它们越来越容易受到无数故障源的影响：小的、低功率的、高性能的器件往往容易出现缺陷，容易受到瞬态错误的影响，并且容易受到性能下降以及早期完全击穿的影响。 如果不解决复原力问题，由此产生的成本将限制新产品的推出，并危及信息技术经济所依赖的稳定增长。 因此，我提出了一个研究计划，重点是开发新的架构和自动化技术，以支持高效，有效的弹性计算机系统的设计。我的计划将集中在三个短期目标：（1）开发新的，兼容性感知的硬件/软件（HW/SW）分区策略;（2）开发弹性系统级架构和组织，特别是针对（a）寿命和产量的提高和（B）低成本的安全关键系统;以及（3）开发并行自动化技术，在这些不同的设计抽象层次上共同优化系统。 该研究计划将为未来针对特定应用领域的研究和开发工作奠定弹性计算的一般原则的坚实基础，并为计算机系统的微架构和电路级设计提供弹性协同优化的额外机会。 此外，它还将为受资助的学生研究助理提供发展并行编程重要技能的机会，特别是使用OpenMP，OpenCL和CUDA等平台，所有这些平台都越来越多地应用于越来越多的重要领域。

Mitigating computer system failure has been a challenge since the dawn of modern computing, but a number of factors are now converging such that resilience (a system's capacity to operate in the presence of failure due to manufacturing defect or faults in the field) is now a first-class design constraint. Semiconductor scaling has made it possible to introduce computers into every aspect of our lives. Scaling, which makes the wires and transistors of integrated circuits increasingly miniature, unfortunately also makes them increasingly vulnerable to myriad sources of failure: small, low-power, high-performance devices tend to be defect-prone, susceptible to transient error, and vulnerable to performance degradation as well as early total breakdown. If resilience is not addressed, the resulting costs will limit the introduction of new products and jeopardize the steady growth on which the information technology economy depends. I therefore propose a research program focusing on the development of novel architectures and automation techniques needed to support the efficient, effective, design of resilient computer systems. My program will focus on three short-term objectives: (1) developing new, resilience-aware hardware/software (HW/SW) partitioning strategies; (2) developing resilient system-level architectures and organizations, specifically targeting (a) lifetime and yield improvement and (b) low-cost safety-critical systems; and, (3) developing parallel automation techniques which co-optimize systems at these various levels of design abstraction. This research program will lay a firm foundation of general principles of resilient computing for future research and development efforts targeting specific application domains, and additional opportunity for resilience co-optimization in the microarchitectural and circuit-level design of computer systems. Furthermore, it will give supported student research assistants the opportunity to develop important skills in parallel programming, especially using platforms such as OpenMP, OpenCL, and CUDA, all of which are increasingly applied in a growing number of important fields.