ML-Based Techniques for Physical Design Automation of SoCs

基于 ML 的 SoC 物理设计自动化技术

• 批准号: 556429-2020
• 负责人: Ivanov, Andre
• 金额: $ 2.19万
• 依托单位: University of British Columbia
• 依托单位国家: 加拿大
• 项目类别: Alliance Grants
• 财政年份: 2021
• 资助国家: 加拿大
• 起止时间: 2021-01-01 至 2022-12-31
• 项目状态: 已结题
• 来源: https://www.nserc-crsng.gc.ca/ase-oro/Details-Detailles_eng.asp?id=722796
• 关键词: ML; Based; Techniques; Physical; Design

Semiconductors and the integrated circuits (ICs) made from them are ubiquitous and continue to penetrate all sectors of our economies, all built and natural environments, the globe, and outer space. ICs built with state of the art manufacturing technologies contain billions of electronic devices (transistors) interconnected together through myriads of intricate and complex layers and strips (wires) of conducting and non-conducting materials. Completing the design and verifying the correctness of such an interconnection network presents formidable challenges. These challenges are partly overcome through the aid of sophisticated computer-aided design (CAD) or electronic design automation (EDA) tools. These tools, in turn, amount to massive, highly complex software packages used by teams of integrated circuit designers worldwide. The level of complexity of the integrated circuits of today and those envisioned in the near and longer term is such that the EDA tools, while able to provide invaluable aid, tend to be very slow to yield viable solutions as the computational complexity of the problem at hand tends to be extremely large. This research is focused on developing novel methodologies aimed at significantly accelerating the phases of integrated circuit design commonly referred to as physical IC design and more specifically as "place and route". We propose to develop a new framework that draws on artificial intelligence, and, in particular, machine learning techniques, to accelerate and improve the quality of place and route EDA tools. The improvements and acceleration we aim for will allow IC designers' efforts to converge on better designs faster. Overall, this paves the way to the production of higher performance ICs in lesser time and at reduced cost. Many Canadian and multi-national companies and organizations are in the business of developing ICs for applications in various sectors. Our research outcomes would directly benefit such companies. Many other organizations, Canadian and multi-national operating in Canada, have their businesses directly or indirectly dependent on ICs. These organizations will also benefit, albeit indirectly, from the results of the work proposed here.

半导体和由它们制成的集成电路（IC）无处不在，并继续渗透到我们经济体的所有部门，所有建筑和自然环境，地球和外太空。使用最先进的制造技术建造的IC包含数十亿个电子设备（晶体管），这些电子设备（晶体管）通过无数复杂且复杂的层以及带和非导电材料的带和条带（电线）相互连接。 完成设计并验证这种互连网络的正确性提出了巨大的挑战。 这些挑战部分通过复杂的计算机辅助设计（CAD）或电子设计自动化（EDA）工具来克服。反过来，这些工具相当于全球综合巡回赛设计师团队使用的大量，高度复杂的软件包。 当今的综合电路和近期和长期设想的电路的复杂程度是如此，EDA工具虽然能够提供宝贵的辅助工具，但由于手头问题的计算复杂性往往非常大，因此产生可行的解决方案往往非常慢。 这项研究的重点是开发旨在显着加速综合电路设计阶段的新方法，通常称为物理IC设计，更具体地称为“位置和路线”。 我们建议开发一个借鉴人工智能的新框架，尤其是机器学习技术，以加速和提高位置和路线EDA工具的质量。我们瞄准的改进和加速度将使IC设计师的努力更快地融合更好的设计。总体而言，这为在较少的时间和成本降低的情况下生产高性能IC的生产铺平了道路。许多加拿大和跨国公司和组织都从事各个部门应用程序开发IC的业务。我们的研究成果将直接受益于此类公司。 加拿大加拿大和跨国运营的许多其他组织将其业务直接或间接依赖于IC。这些组织还将从这里提出的工作结果间接受益。