Design Methods and Architectures of Reliable and Dependable Microelectronic Systems

该项目侧重于在具有严格可靠性要求的环境中使用商用现货（COTS）集成电路（ic）和微电子技术。事实上，2011年和2012年推出的旗舰处理器和现场可编程门阵列（fpga）采用28纳米技术制造，包含多达70亿个晶体管。当这些技术用于实现专用集成电路（asic）或集成电路系统（soc）时，与它们相关的非重复性工程（NRE）成本不断上升，很少有人能够负担得起。例如，从头开始设计并将新的复杂SoC推向市场的成本约为1亿美元，即使是在充分利用现有设计方法的情况下。随着处理器和fpga的不断改进，减少NREs的可编程和可配置设备可以满足越来越多的应用需求。这对在可靠的应用程序中使用COTS复杂组件提出了强烈的需求。这个建议涉及到，首先，调查设计方法和架构，指导和支持设计师找到有效的解决方案，其次，提出基于不太可靠的COTS组件设计可靠系统的方法。

This proposed project focuses on using commercial-off-the-shelf (COTS) integrated circuits (ICs) and microelectronic technologies in environments that have stringent reliability requirements. Indeed, flagship processors and field programmable gate arrays (FPGAs) introduced in 2011 and 2012, fabricated in 28 nm technologies, contain as many as 7 billion transistors. Non-Recurring Engineering (NRE) costs associated with them escalated at levels that few can afford when those technologies are used to implement Application Specific ICs (ASICs) or Systems on an IC (SoCs). For instance, designing from scratch and bringing to market a new complex SoC costs on the order of 100 million dollars, even when existing design methods are fully leveraged. As processors and FPGAs keep improving, programmable and configurable devices that slash NREs can satisfy the needs of a growing set of applications. This sets a strong demand for using COTS complex components in dependable applications. This proposal relates to, first, investigate design methods and architectures that guide and support the designers toward effective solutions, and, second, propose ways to design reliable systems based on less reliable COTS components. The proposed research focuses on several complementary generic concerns. A first main concern is that most existing ICs are developed to meet requirements of high volume applications, for which reliability and dependability are second order considerations at best. Also, existing techniques and architectures favor average performance over worst case performance, and their complexity makes precise worst case performance very difficult to guarantee. Another main concern with memories and FPGAs is their sensitivity to Single Event Effects (SEEs) causing transients and errors in ICs. The high level objectives of the proposed research are: 1) to investigate design methods and architectures that guide and support the design process toward effective solutions and 2) to explore means of making more reliable and dependable electronic systems from components not specifically designed for that. We notably propose investigating means of designing integrated systems with complex embedded components, as well as modeling and mitigation of single event effects (SEEs) caused by ubiquitous cosmic rays. These high level objectives are refined as the following specific objectives: A) Propose and validate new methods for developing energy efficient implementations of systems combining embedded processors with hardware support; B) Propose and validate methods for modeling and abstracting SEEs, and for validating robustness of resulting systems ; C) Refine the faulty signature modeling method; D) Model reliability and dependability of FPGA based systems comprising SEE mitigation techniques. The importance of the work stems from the pervasive nature of electronic systems and the increasing reliance on these technologies in our daily lives, which can be a real concern when COTS components are widely used in critical applications for economic reasons. Using methods resulting from this research, developers will better understand where, when, why, and how COTS technologies can be adopted to meet reliability and dependability requirements of various forms of electronic systems. The proposal not only aims at pure discovery type contributions, but is also structured to provide an excellent framework for training highly qualified personnel at making discovery research work relevant for Canadian industry and for society as well as for developing deep knowledge and skills with advanced electronic system design methods, state-of-the-art computer aided design tools and technologies for implementing practical electronic systems.