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VairCRAFT : Versatile Systems-on-Chip Integration to Reduce Aircraft Weight and Gas Emission

VairCRAFT : Versatile Systems-on-Chip Integration to Reduce Aircraft Weight and Gas Emission
VairCRAFT:多功能片上系统集成,可减少飞机重量和气体排放
批准号:
522883-2017
负责人:
Savaria, Yvon
金额:
$36.28万
依托单位国家:
加拿大
项目类别:
Collaborative Research and Development Grants
财政年份:
2020
资助国家:
加拿大
项目状态:
已结题
起止时间:
2020-01-01 至 2021-12-31

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英文摘要
Nowadays the number of sensors, actuators and corresponding bulky electronic systems as well as their related power and data cables, which occupy a remarkable space and increase the weight of aircrafts, are rapidly growing in modern aircrafts. The resulting consequences have made the aeronautic and aerospace industries actively look for solutions to miniaturize conventional electronic systems and their related accessories to reduce the bulkiness and weight. Reconfigurable systems, System-on-chip (SoC), where electronic parts are integrated on a single chip and system-in-package (SiP), where different SoC made of different technologies are integrated on a single package, are alternatives to achieve that level of miniaturization. Referring to the mentioned concepts, the main objective of this research is to integrated building blocks for a versatile aircraft (VairCRAFT). This will not only have impressive impacts on reducing the weight of aircrafts and its consequences, but it also provides a mean to have a higher level of versatility which is important in an aircraft due to different sensor and actuator specifications. To achieve above objective, different sensor interfaces will be integrated over SoCs or SiPs. Such sensor interfaces are supposed to generate required currents and voltages to excite different sensors and actuators, e.g. linear variable differential transformers, through power electronic circuits e.g. power amplifiers. That is why the sensor interfaces must be versatile. Read back circuits, which includes filters, sense amplifiers and data converters, are supposed to monitor and control the sensor interfaces. Once integrated, different chips will individually be evaluated first and the individual characterized chips will be integrated on a single package to provide a miniaturized sensor interface prototype. These efforts bring economic and environmental benefits by drastically diminishing the consumed fuel and greenhouse emissions, respectively.
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Hardware support for reliable networking; from protocols to accelerators
  • 批准号:
    RGPIN-2019-05951
  • 项目类别:
    Discovery Grants Program - Individual
  • 资助金额:
    $2.84万
  • 财政年份:
    2022
  • 负责人:
    Savaria, Yvon
  • 依托单位:
Hardware support for reliable networking; from protocols to accelerators
  • 批准号:
    RGPIN-2019-05951
  • 项目类别:
    Discovery Grants Program - Individual
  • 资助金额:
    $2.84万
  • 财政年份:
    2021
  • 负责人:
    Savaria, Yvon
  • 依托单位:
NSERC Industrial Research Chair (IRC) for High Speed and Programmable Packet Processing
  • 批准号:
    548237-2018
  • 项目类别:
    Industrial Research Chairs
  • 资助金额:
    $13.26万
  • 财政年份:
    2021
  • 负责人:
    Savaria, Yvon
  • 依托单位:
NSERC Industrial Research Chair (IRC) for High Speed and Programmable Packet Processing
  • 批准号:
    548237-2018
  • 项目类别:
    Industrial Research Chairs
  • 资助金额:
    $13.26万
  • 财政年份:
    2020
  • 负责人:
    Savaria, Yvon
  • 依托单位:
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