Design Methods and Architectures of Reliable and Dependable Microelectronic Systems
Design Methods and Architectures of Reliable and Dependable Microelectronic Systems
批准号:
RGPIN-2014-05295
负责人:
Savaria, Yvon
金额:
$3.06万
依托单位国家:
加拿大
项目类别:
Discovery Grants Program - Individual
财政年份:
2018
资助国家:
加拿大
项目状态:
已结题
起止时间:
2018-01-01 至 2019-12-31
中文摘要
该项目侧重于在具有严格可靠性要求的环境中使用商用现货(COTS)集成电路(ic)和微电子技术。事实上,2011年和2012年推出的旗舰处理器和现场可编程门阵列(fpga)采用28纳米技术制造,包含多达70亿个晶体管。当这些技术用于实现专用集成电路(asic)或集成电路系统(soc)时,与它们相关的非重复性工程(NRE)成本不断上升,很少有人能够负担得起。例如,从头开始设计并将新的复杂SoC推向市场的成本约为1亿美元,即使是在充分利用现有设计方法的情况下。随着处理器和fpga的不断改进,减少NREs的可编程和可配置设备可以满足越来越多的应用需求。这对在可靠的应用程序中使用COTS复杂组件提出了强烈的需求。这个建议涉及到,首先,调查设计方法和架构,指导和支持设计师找到有效的解决方案,其次,提出基于不太可靠的COTS组件设计可靠系统的方法。*拟议的研究侧重于几个互补的一般问题。第一个主要问题是,大多数现有的集成电路都是为满足大批量应用程序的需求而开发的,对于大批量应用程序来说,可靠性和可靠性充其量只是次要的考虑因素。此外,现有的技术和体系结构倾向于平均性能而不是最坏情况下的性能,它们的复杂性使得很难保证精确的最坏情况下的性能。存储器和fpga的另一个主要问题是它们对引起ic瞬态和错误的单事件效应(see)的敏感性。*建议研究的高水平目标是:1)调查指导和支持设计过程的设计方法和架构,以获得有效的解决方案;2)探索从非专门设计的组件中制造更可靠和可靠的电子系统的方法。我们特别建议研究设计具有复杂嵌入式组件的集成系统的方法,以及由无处不在的宇宙射线引起的单事件效应(SEEs)的建模和缓解。这些高层次的目标被细化为以下具体目标:*A)提出并验证开发结合嵌入式处理器和硬件支持的节能系统的新方法;*B)提出并验证建模和抽象see的方法,以及验证结果系统的鲁棒性的方法;*C)改进故障签名建模方法;*D)包含SEE缓解技术的基于FPGA的系统的模型可靠性和可靠性。*这项工作的重要性源于电子系统的普遍性质以及我们日常生活中对这些技术的日益依赖,当COTS组件出于经济原因被广泛用于关键应用时,这可能是一个真正的问题。使用从这项研究中得到的方法,开发人员将更好地理解在何处、何时、为什么以及如何采用COTS技术来满足各种形式的电子系统的可靠性和可靠性需求。该提案不仅针对纯粹的发现型贡献,而且还旨在为培养高素质人才提供良好的框架,使发现研究工作与加拿大工业和社会相关,并发展具有先进电子系统设计方法,最先进的计算机辅助设计工具和实施实用电子系统技术的深厚知识和技能。
英文摘要
This proposed project focuses on using commercial-off-the-shelf (COTS) integrated circuits (ICs) and microelectronic technologies in environments that have stringent reliability requirements. Indeed, flagship processors and field programmable gate arrays (FPGAs) introduced in 2011 and 2012, fabricated in 28 nm technologies, contain as many as 7 billion transistors. Non-Recurring Engineering (NRE) costs associated with them escalated at levels that few can afford when those technologies are used to implement Application Specific ICs (ASICs) or Systems on an IC (SoCs). For instance, designing from scratch and bringing to market a new complex SoC costs on the order of 100 million dollars, even when existing design methods are fully leveraged. As processors and FPGAs keep improving, programmable and configurable devices that slash NREs can satisfy the needs of a growing set of applications. This sets a strong demand for using COTS complex components in dependable applications. This proposal relates to, first, investigate design methods and architectures that guide and support the designers toward effective solutions, and, second, propose ways to design reliable systems based on less reliable COTS components.*The proposed research focuses on several complementary generic concerns. A first main concern is that most existing ICs are developed to meet requirements of high volume applications, for which reliability and dependability are second order considerations at best. Also, existing techniques and architectures favor average performance over worst case performance, and their complexity makes precise worst case performance very difficult to guarantee. Another main concern with memories and FPGAs is their sensitivity to Single Event Effects (SEEs) causing transients and errors in ICs.*The high level objectives of the proposed research are: 1) to investigate design methods and architectures that guide and support the design process toward effective solutions and 2) to explore means of making more reliable and dependable electronic systems from components not specifically designed for that. We notably propose investigating means of designing integrated systems with complex embedded components, as well as modeling and mitigation of single event effects (SEEs) caused by ubiquitous cosmic rays. These high level objectives are refined as the following specific objectives: *A) Propose and validate new methods for developing energy efficient implementations of systems combining embedded processors with hardware support;*B) Propose and validate methods for modeling and abstracting SEEs, and for validating robustness of resulting systems ;*C) Refine the faulty signature modeling method;*D) Model reliability and dependability of FPGA based systems comprising SEE mitigation techniques.*The importance of the work stems from the pervasive nature of electronic systems and the increasing reliance on these technologies in our daily lives, which can be a real concern when COTS components are widely used in critical applications for economic reasons. Using methods resulting from this research, developers will better understand where, when, why, and how COTS technologies can be adopted to meet reliability and dependability requirements of various forms of electronic systems. The proposal not only aims at pure discovery type contributions, but is also structured to provide an excellent framework for training highly qualified personnel at making discovery research work relevant for Canadian industry and for society as well as for developing deep knowledge and skills with advanced electronic system design methods, state-of-the-art computer aided design tools and technologies for implementing practical electronic systems.
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批准号:RGPIN-2019-05951
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项目类别:Discovery Grants Program - Individual
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资助金额:$2.84万
-
财政年份:2022
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负责人:Savaria, Yvon
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依托单位:
Hardware support for reliable networking; from protocols to accelerators
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批准号:RGPIN-2019-05951
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项目类别:Discovery Grants Program - Individual
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资助金额:$2.84万
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依托单位:
NSERC Industrial Research Chair (IRC) for High Speed and Programmable Packet Processing
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项目类别:Collaborative Research and Development Grants
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财政年份:2020
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负责人:Savaria, Yvon
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Hardware support for reliable networking; from protocols to accelerators
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批准号:RGPIN-2019-05951
-
项目类别:Discovery Grants Program - Individual
-
资助金额:$2.84万
-
财政年份:2020
-
负责人:Savaria, Yvon
-
依托单位:
Hardware support for reliable networking; from protocols to accelerators
-
批准号:RGPIN-2019-05951
-
项目类别:Discovery Grants Program - Individual
-
资助金额:$2.84万
-
财政年份:2019
-
负责人:Savaria, Yvon
-
依托单位:
NSERC Industrial Research Chair (IRC) for High Speed and Programmable Packet Processing
-
批准号:548237-2018
-
项目类别:Industrial Research Chairs
-
资助金额:$13.26万
-
财政年份:2019
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负责人:Savaria, Yvon
-
依托单位:
VairCRAFT : Versatile Systems-on-Chip Integration to Reduce Aircraft Weight and Gas Emission
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批准号:522883-2017
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项目类别:Collaborative Research and Development Grants
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资助金额:$24.19万
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财政年份:2019
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负责人:Savaria, Yvon
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依托单位:
Ultra-Low Overhead Protocol for Efficient Data-Center Networking
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批准号:523217-2018
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项目类别:Engage Grants Program
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资助金额:$1.82万
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负责人:Savaria, Yvon
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资助金额:$1.82万
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财政年份:2017
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负责人:Savaria, Yvon
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依托单位:
Design Methods and Architectures of Reliable and Dependable Microelectronic Systems
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项目类别:Discovery Grants Program - Individual
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资助金额:$3.06万
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财政年份:2017
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负责人:Savaria, Yvon
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依托单位:
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资助金额:$11.79万
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财政年份:2016
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负责人:Savaria, Yvon
-
依托单位:
Design Methods and Architectures of Reliable and Dependable Microelectronic Systems
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批准号:RGPIN-2014-05295
-
项目类别:Discovery Grants Program - Individual
-
资助金额:$3.06万
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财政年份:2016
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负责人:Savaria, Yvon
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依托单位:
Algorithms, architectures, models, and programming methods for agile high-speed software-defined networking
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批准号:462474-2013
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资助金额:$12.96万
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财政年份:2015
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负责人:Savaria, Yvon
-
依托单位:
Design Methods and Architectures of Reliable and Dependable Microelectronic Systems
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批准号:RGPIN-2014-05295
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项目类别:Discovery Grants Program - Individual
-
资助金额:$3.06万
-
财政年份:2015
-
负责人:Savaria, Yvon
-
依托单位:
Design Methods and Architectures of Reliable and Dependable Microelectronic Systems
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批准号:RGPIN-2014-05295
-
项目类别:Discovery Grants Program - Individual
-
资助金额:$3.06万
-
财政年份:2014
-
负责人:Savaria, Yvon
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依托单位:
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项目类别:Canada Research Chairs
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资助金额:$14.57万
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负责人:Savaria, Yvon
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依托单位:
Optimization of a simple lens deblurring algorithm for graphics processing units
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批准号:469910-2014
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项目类别:Engage Grants Program
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资助金额:$1.82万
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财政年份:2014
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负责人:Savaria, Yvon
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依托单位:
Algorithms, architectures, models, and programming methods for agile high-speed software-defined networking
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批准号:462474-2013
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项目类别:Collaborative Research and Development Grants
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资助金额:$11.36万
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财政年份:2014
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负责人:Savaria, Yvon
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依托单位:
国内基金
海外基金
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依托单位: