An Adaptive 3T-3MTJ Memory Cell Design for STT-MRAM-Based LLCs
An Adaptive 3T-3MTJ Memory Cell Design for STT-MRAM-Based LLCs
复制标题
适用于基于 STT-MRAM 的 LLC 的自适应 3T-3MTJ 存储单元设计
DOI：
10.1109/tvlsi.2017.2780522
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发表时间：
2018-01
影响因子：
2.8
通讯作者：
Yuan Xie
中科院分区：
文献类型：
--
作者：
Linuo Xue;Bi Wu;Beibei Zhang;Yuanqing Cheng;Peiyuan Wang;Ch;o Park;Jimmy Kan;Seung H. Kang;Yuan Xie
由于其高密度，低备用功率和不挥发性，STT-MRAM技术是未来片上缓存内存的有前途的候选人。随着技术节点的尺度，尤其是在40 nm技术节点以下，STT-MRAM细胞设计成为关键I
The STT-MRAM technology is a promising candidate for future on-chip cache memory because of its high density, low standby power, and nonvolatility. As the technology node scales, especially under 40-nm technology node, STT-MRAM cell design becomes a key issue to approach low power consumption, high access performance, and desirable reliability. The conventional 1T-1 magnetic tunnel junction (MTJ) and 2T-2MTJ cell designs cannot address these challenges efficiently. In this paper, we propose a novel 3T-3MTJ cell structure using the advanced perpendicular MTJ (p-MTJ) technology. It can store 2 bits with three MTJs. The differential sensing technique can be used to read out the most significant bit as fast as the 2T-2MTJ design. The sensing latency of 2 bits within the same cell is almost the same as the sensing latency of the 1T-1MTJ cell design. Therefore, the 3T-3MTJ cell can have the advantages of both 2T-2MTJ and 1T-1MTJ cells. Circuit-level simulations show that the proposed 3T-3MTJ cell structure can achieve a desirable tradeoff between storage density, access performance, and energy consumption compared to the prior 1T-1MTJ and 2T-2MTJ cell structures. Additionally, we propose a novel adaptive cache design based on the 3T-3MTJ cell structure, which can work in different modes to satisfy various memory access demands from different applications. Architecture level simulations validate the effectiveness of the proposed cache design.
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DOI：
10.1109/vlsic.2012.6243782
发表时间：
2012-06
期刊：
2012 Symposium on VLSI Circuits (VLSIC)
影响因子：
--
作者：
T. Ohsawa;H. Koike;S. Miura;H. Honjo;K. Tokutome;S. Ikeda;T. Hanyu;H. Ohno;T. Endoh
通讯作者：
T. Ohsawa;H. Koike;S. Miura;H. Honjo;K. Tokutome;S. Ikeda;T. Hanyu;H. Ohno;T. Endoh
DOI：
10.1109/iedm.2013.6724690
发表时间：
2013-12
期刊：
2013 IEEE International Electron Devices Meeting
影响因子：
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作者：
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通讯作者：
H. Noguchi;S. Takeda;K. Nomura;K. Abe;K. Ikegami;E. Kitagawa;N. Shimomura;J. Ito;S. Fujita
DOI：
10.1109/imw.2013.6582102
发表时间：
2013-05
期刊：
2013 5th IEEE International Memory Workshop
影响因子：
--
作者：
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A. Kawasumi;K. Kushida;H. Hara;Y. Unekawa;K. Abe;K. Ikegami;H. Noguchi;E. Kitagawa;C. Kamata;S. Kashiwada;Y. Kato;D. Saida;N. Shimomura;J. Ito;S. Fujita
DOI：
10.1109/vlsic.2014.6858403
发表时间：
2014-06
期刊：
2014 Symposium on VLSI Circuits Digest of Technical Papers
影响因子：
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作者：
H. Noguchi;K. Ikegami;N. Shimomura;T. Tanamoto;J. Ito;S. Fujita
通讯作者：
H. Noguchi;K. Ikegami;N. Shimomura;T. Tanamoto;J. Ito;S. Fujita
DOI：
10.1145/2429384.2429498
发表时间：
2012-11
期刊：
2012 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)
影响因子：
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作者：
Yaojun Zhang;Lu Zhang;Wujie Wen;Guangyu Sun;Yiran Chen
通讯作者：
Yaojun Zhang;Lu Zhang;Wujie Wen;Guangyu Sun;Yiran Chen