Physical Assurance for Heterogeneous Integration: Challenges and Opportunities
Physical Assurance for Heterogeneous Integration: Challenges and Opportunities
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异构集成的物理保障：挑战与机遇
DOI：
10.1109/ipfa55383.2022.9915749
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发表时间：
2022
期刊：
影响因子：
--
通讯作者：
Asadizanjani, Navid
中科院分区：
文献类型：
--
作者：
Xi, Chengjie;Khan, Aslam A.;Jessurun, Nathan;Vashisthan, Nidish;Tehranipoor, Mark M.;Asadizanjani, Navid
集成电路 (IC) 硬件保障是半导体行业日益关注的话题。由于 IC 是行业的基本构建模块，因此它们始终成为对抗性攻击的目标。物理检查方法（即扫描电子显微镜 (SEM)、X 射线和太赫兹）用于验证从晶体管到器件级别的 IC 硬件。然而，这些检测方法由于其固有的局限性和样本的复杂性，很难应用于新兴的封装技术和异构集成（HI）。 HI 复杂性可以提供一些可用作对策的固有特征。例如，材料和结构指纹可用于监控、验证和提供设备保证。本文将介绍 HI 硬件中潜在的安全漏洞，并回顾各种物理检查方法及其围绕综合保障的局限性。将讨论非破坏性和破坏性方法，范围从材料/结构分析到晶体管级物理检查。本文还将探讨将 MEMS 和 NEMS 植入封装中以确保原始设计的安全。
Integrated Circuit (IC) hardware assurance is an increasingly concerning topic for semiconductor industries. Because ICs are the industries’ fundamental building blocks, they are consistently targeted for adversarial attacks. Physical inspection methods (i.e., Scanning Electron Microscopy (SEM), X-ray, and THz) are used to verify the IC hardware from the transistor to the device level. However, these inspection methods are difficult to apply to emerging packaging technologies and Heterogeneous Integration (HI) due to their inherent limitations and sample complexity. HI complex nature can provide some inherent features employable as countermeasures. For instance, the material and the structural fingerprints can be used to monitor, verify, and provide device assurance. This paper will introduce potential security vulnerabilities in HI hardware and review various physical inspection methods and their limitations surrounding comprehensive assurance. Both non-destructive and destructive methods will be discussed, ranging from material/structural analysis to transistor-level physical inspection. Insights to the MEMS & NEMS implantation into the package to secure the original design, will be also explored in this paper.
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