Modeling of imprint in hysteresis loop of ferroelectric thin films with top and bottom interface layers

Modeling of imprint in hysteresis loop of ferroelectric thin films with top and bottom interface layers
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具有顶部和底部界面层的铁电薄膜磁滞回线中的印记建模

DOI:
10.1063/1.2433026
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发表时间:
2007-01
影响因子:
4
通讯作者:
--
中科院分区:
物理与天体物理2区
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--
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用一种改进的模型研究了铁电薄膜电容器的压痕,该模型由上下电极附近的两个非开关薄界面层组成。两个界面层之间的电导率差异导致了磁滞回线中的电压偏移和变形行为。通过考虑界面层和体膜的厚度比,定性地解释了Bi4−xNdxTi3O12薄膜移位效应的尺寸依赖关系。通过改变层的电导率,有效地再现了具有不同电极和工艺的各种位移和变形形状。模拟得到的位移磁滞回线与实验结果吻合较好。基于该方法的理论预测可以为减少压印失效提供一种方法。
The imprint of a ferroelectric thin film capacitor is studied using an improved model consisting of two nonswitching thin interface layers near the top and bottom electrodes. The difference in electrical conductivity between the two interface layers induces voltage offset and deformation behaviors in hysteresis loops. Size dependence of shift effect of Bi4−xNdxTi3O12 thin film is explained qualitatively by taking into account the thickness ratio of the interface layer and the bulk film. Various shifts and anamorphic shapes with different electrodes and processes have been effectively reproduced through changing the layer conductivities. The simulated shifted hysteresis loops agree well with the experiment. Theoretical prediction based on this approach may provide a method to reduce imprint failure.
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