Design and Analysis of an Area-Efficient High Holding Voltage ESD Protection Device

Design and Analysis of an Area-Efficient High Holding Voltage ESD Protection Device
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面积高效的高保持电压ESD保护器件的设计与分析

DOI:
10.1109/ted.2014.2381511
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发表时间:
2015-01
影响因子:
3.1
通讯作者:
Wang Weihuai
Wang Weihuai
中科院分区:
工程技术2区
文献类型:
--
作者:
Zeng Jie;Dong Shurong;Liou Juin J.;Han Yan;Zhong Lei;Wang Weihuai

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提出了一种新型的栅接地nMOS(GGnMOS)集成可控硅整流器(GGISCR)的静电放电保护器件。GGISCR的一个突出特点是嵌入式浮置P+区,被证明是上级优于传统的低电压触发的SCR和GGnMOS的高面积效率和高保持电压。详细讨论了GGISCR器件的工作机理,并通过TCAD模拟结果分析了P+浮置区对GGISCR I-V特性的影响。
A novel electrostatic discharge protection device gate-grounded nMOS (GGnMOS) incorporated silicon-controlled rectifier (GGISCR) is proposed in this paper. With a distinguished feature of an imbedded floating P+ region, the GGISCR is demonstrated to be superior to the conventional low voltage triggered SCR and GGnMOS in terms of high area efficiency and high holding voltage. The operational mechanism of GGISCR device is discussed in detail, and the effect of floating P+ region on the GGISCR's I-V characteristics is analyzed via TCAD simulation results as well.
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