Easily Manufacturable Implementation of Large Area Defect Tolerant IC's

该项目正在开发制造大面积 在标准集成电路（IC）生产线上生产集成电路。 的 所考虑的电路的面积是电流的10到50倍， 电路. 研究人员正在描述制造缺陷， 集成电路，并分析这些以预测芯片产量。 从 这些预测，他们可以选择各种技术， 缺陷容限的重新配置。

This project is developing techniques for fabricating large-area integrated circuits (IC) on standard IC fabrication lines. The circuits under consideration are 10 to 50 times the area of current circuits. The researchers are characterizing manufacturing defects on integrated circuits, and analyzing these to predict chip yields. From these predictions they can select among various techniques for on-chip reconfiguration for defect tolerance.