Architecture Synthesis and Retargetability for High- Performance Application-Specific Processors

提出了一种新的指令级并行体系结构XIMD。与包括流水线RISC在内的传统标量单处理器相比，该体系结构模型可以为更广泛的应用提供更好的性能和效率。XIMD体系结构采用多个功能单元，可以支持可变数量的指令流的并发执行。其硬件实现的规律性和简单性使其具有高度的可伸缩性和重定目标，以适应不同的应用代码特征。目前，XIMD体系结构模型正在开发和评估中。一个用于基准XIMD体系结构的功能级模拟器正在实施中。利用该模拟器可以对XIMD的性能和效率进行定量的分析。一台实用的XIMD机器样机也在设计中。正在评估使用现有部件实施的可行性和可实现的性能。支持XIMD体系结构模型的编译方法和技术也在研究中。

A new instruction-level parallel (ILP) architecture called XIMD is proposed. This architecture model can provide better performance and efficiency for a broader range of applications than traditional scalar uniprocessors including pipelined RISC. The XIMD architecture employs multiple functional units and can support the concurrent execution of a variable number of instruction streams. The regularity and simplicity of its hardware implementation makes it highly scalable and retargetable to accommodate diverse application code characteristics. Currently, the XIMD architecture model is being developed and evaluated. A functional level simulator for a baseline XIMD architecture is being implemented. Using this simulator the performance and efficiency of the XIMD can be quantitatively analyzed. A practical prototype XIMD machine is also being designed. Implementation feasibility and achievable performance using currently available parts are being assessed. Compilation methodology and techniques to support the XIMD architecture model are also being investigated.