CISE Educational Infrastructure: "Modern Processor Design: A New Computer Engineering Course"

CISE 教育基础设施：“现代处理器设计：一门新的计算机工程课程”

• 批准号: 9214908
• 负责人: John Shen
• 金额: $ 20.44万
• 依托单位: Carnegie-Mellon University
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 1992
• 资助国家: 美国
• 起止时间: 1992-09-01 至 1996-02-29
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=9214908&HistoricalAwards=false
• 关键词: CISE; Educational; Infrastructure; Modern; Processor

This award is for the development of a course on modern processor design that will focus on instruction level parallel (ILP) processing in single chip processors and will include techniques for superpipelined and superscalar processor design, instruction scheduling techniques for ILP type processor, and instruction-level performance evaluation and characterization. A new processor design methodology involving experimentation and quantitative analysis of the performance impact of specific design features will be presented in the course. Dr. Shen will be writing a textbook as well as a set of lecture notes for distribution to other institutions. This award is for the development of a senior-level computer engineering course on modern processor design. The course will address contemporary processor design techniques relevant to the design of current and future generation processors that exploit instruction level parallelisms. Examples include superpipelined, superscalar, supersymmetry and Very Long Instruction Word (VLIW) processors. A textbook and a set of lecture notes will be disseminated as part of this project.

这个奖项是为了发展一门现代化的课程， 处理器设计将集中在指令级并行 (ILP)处理在单芯片处理器，并将包括 超流水线和超标量处理器技术 ILP型指令调度技术的设计 处理器，以及配置级别的性能评估， 特征化 一种新的处理器设计方法 包括实验和定量分析， 具体设计特征的性能影响将 在课程中介绍。 沈博士会写一本教科书 以及一套课堂讲稿， 机构职能体系 这个奖项是为了表彰高级计算机的开发 现代处理器设计的工程课程。 过程 将解决当代处理器设计技术相关 当前和未来一代处理器的设计， 利用指令级并行。 实例包括 超流水线、超标量、超对称和超长 指令字（VLIW）处理器。 一本教科书和一套 作为该项目的一部分，将分发课堂讲稿。