Design of Ultra-Low Power IC's

超低功耗 IC 的设计

• 批准号: 9408457
• 负责人: Larry Carley
• 金额: $ 85.4万
• 依托单位: Carnegie-Mellon University
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 1994
• 资助国家: 美国
• 起止时间: 1994-08-01 至 1998-07-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=9408457&HistoricalAwards=false
• 关键词: Design; Ultra; Low; Power; IC

This project combines analog circuit design and CAD to produce digital circuits that can operate at substantially reduced voltages, which will result in lower power consumption. The project has introduced the QuadRail logic family, which allows voltage control of transistor thresholds to maintain constant logic thresholds. Use of this family permits lower supply voltages because of the tighter control of device thresholds. However, use of this family requires optimization of individual digital cells, new device layout methods, and new strategies for floorplanning, placement, and routing. The research in this project is exploring all of these optimization areas, and is producing a battery powered demonstration system for speech signal processing.

该项目将模拟电路设计和CAD相结合，以生产可以在大幅降低的电压下工作的数字电路，从而降低功耗。 该项目引入了QuadRail逻辑系列，允许对晶体管阈值进行电压控制，以保持恒定的逻辑阈值。 由于对器件阈值的控制更严格，因此使用该系列可以降低电源电压。 然而，使用该系列需要优化单个数字单元、新的器件布局方法以及用于布局规划、放置和布线的新策略。 本项目的研究正在探索所有这些优化领域，并正在制作一个电池供电的语音信号处理演示系统。