Probabilistic-based Ultra-Low Supply Voltage Noise-Tolerant Circuits and Systems Design

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Power consumption has become a key performance criterion for integrated circuit design, especially in battery-based portable systems. Decreasing supply voltage is one of the most efficient and universal techniques to reduce energy dissipation because power is proportional to the square of supply voltage. However, when CMOS devices are scaled down following Moore's law, noise tolerance becomes the bottleneck for the viability of nanoscale circuits. Furthermore, the smaller noise margin in low-voltage CMOS systems renders them even more sensitive to noise. Soft faults (caused by inherent noise and signal coupling) and hard faults (caused by variability and defects of fabrication technologies) present an obvious problem in nanoscale circuits. Random and dynamic noise, however, do not decrease in the same proportion as supply voltage is scaled down, which becomes a major challenge for low-supply-voltage designs.*******This Discovery Grant will be used to support the applicant's ongoing Markov Random Field (MRF) research. The long-term goal is to develop a game-changing probabilistic-based methodology, which can influence future CMOS design. MRF technology is commonly used in signal processing and communication systems. Its creative extension to hardware circuits (pioneered by the applicant) is both highly innovative and with the potential for great rewards in solving intrinsic soft faults and hard faults in nanoscale circuits. His co-authored milestone paper on MRF circuit design was cited 115 times since it was first published in IEEE/ACM international conference on computer-aided design in 2003. The research group also implemented the world's first-ever proof-of-concept MRF adder using the 0.13-m CMOS process technology for validation. The results show that the circuit can reliably operate at ultra-low supply voltage and achieve significant power saving. They received the Best Innovation Prize at the 7th MXIC IC Design Contest (the largest and the most influential annual IC design contest in Taiwan). Many research groups worldwide have followed and improved MRF design methodology since 2003.******This Discovery Grant will provide operating funds over the next 5 years to support the applicant to continuously explore the potential of MRF design: especially optimizing the probabilistic design methodology, and applying the MRF design methodology to implement large-scale signal processing and communication systems. Two-thirds of the Discovery Grant will be used to train students. The applicant will use the research discoveries from this grant to facilitate access to other funding from collaborative industry and government programs. The applicant expects this grant can yield a meaningful impact on Canadian low-power electronics industry with wide ranging applications in the fields of information and communications technology and portable battery-powered healthcare devices.