Experimental Microelectronic Embedded Systems for Image Processing and Intelligent Sensors

用于图像处理和智能传感器的实验微电子嵌入式系统

基本信息

项目摘要

9553354 Tewksbury Within the last few years, it has become obvious that a profound and far-ranging paradigm shift in the practice of (and computer-aided design - CAD - tools for) the design of competitive electronic system modules has occurred. Earlier, designers worked with relatively simple ICs performing specific logic functions to create an innovative and novel system realization. Packaged integrated circuits (ICs) had a limited number (14 - 64) of external connections (I/O) and were readily hand soldered onto thru-hole printed circuit boards or connected using standard wire-wrap prototyping techniques. This general approach for circuit boards remained largely unchanged for over two decades and provided the necessary capabilities until a few years ago. During that period, the complexity of digital ICs was doubling approximately every 18 months, with the simple quad gates per IC evolving into today's ICs with hundreds of thousands of gates per IC. Present high-density VLSI ICs routinely require several hundred I/O pins and industry projections suggesting several thousand I/O pins per IC within a little more than a decade. Over much of the last 20 years, the clock rate of digital systems remained surprisingly constant, in the range 10 to 25 MHz. However, the last few years also has seen a remarkably fast progression to higher clock rates extending well above 100 MHz. This progression to higher clock rates also impacts system prototyping dramatically, requiring special techniques to handle not only the fast signal transitions but also the large number of interconnections and I/O lines operating at high speed. The project will obtain (i) for equipment to fabricate prototype, multilayer, surface mount, printed circuit boards (PCBs) and to mount advanced VLSI components on those boards and (ii) for initial research related to image processing accelerators, intelligent sensor systems, and advanced packaging/interconnection technologies. These capabilities provid e a foundation for a broad, experimental program in high performance, embedded microelectronic systems, supplementing existing capabilities for advanced packaging and interconnection technologies presently available. The project will result in a strong experimental microelectronic systems research program designed to provide (i) innovations in microelectronic systems education (undergraduate and graduate), (ii) outreach to companies in WV both for continuing education and for R&D support, (iii) development of high performance modules in support of interdisciplinary research within the academic research community of WV, and (iv) development of a more competitive position for research in the area of high performance microelectronic systems.
9553354图克斯伯里在过去的几年里,很明显,竞争性电子系统模块的设计实践(以及用于设计的计算机辅助设计-计算机辅助设计-工具)已经发生了深刻和广泛的范式转变。早些时候,设计者使用相对简单的IC来执行特定的逻辑功能,以创建创新和新颖的系统实现。封装集成电路(IC)的外部连接(I/O)数量有限(14-),并且很容易手工焊接到通孔印刷电路板上,或者使用标准的线绕原型技术进行连接。20多年来,电路板的这种一般方法基本上没有变化,直到几年前才提供了必要的能力。在此期间,数字IC的复杂性大约每18个月翻一番,每个IC的简单四门演变为今天每个IC具有数十万个门的IC。目前的高密度VLSI IC通常需要数百个I/O管脚,而行业预测表明,在十年多一点的时间内,每个IC需要数千个I/O管脚。在过去20年的大部分时间里,数字系统的时钟频率出人意料地保持不变,在10到25 MHz的范围内。然而,在过去的几年里,也见证了向更高时钟频率的惊人快速发展,扩展到远高于100 MHz。这种向更高时钟速率的发展也极大地影响了系统原型,不仅需要特殊的技术来处理快速的信号转换,而且还需要大量的互连和高速运行的I/O线。该项目将获得(I)制造原型、多层、表面贴装、印刷电路板(PCB)和在这些电路板上安装先进的VLSI组件的设备,以及(Ii)与图像处理加速器、智能传感器系统和先进的封装/互连技术相关的初步研究。这些能力为高性能嵌入式微电子系统的广泛实验计划提供了基础,补充了目前可用的先进封装和互连技术的现有能力。该项目将产生一个强大的实验性微电子系统研究计划,旨在提供(I)微电子系统教育(本科生和研究生)方面的创新,(Ii)在继续教育和研发支持方面与西弗吉尼亚州的公司进行接触,(Iii)开发高性能模块,以支持西弗吉尼亚州学术研究社区内的跨学科研究,以及(Iv)在高性能微电子系统领域的研究方面发展更具竞争力的地位。

项目成果

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Stuart Tewksbury其他文献

Stuart Tewksbury的其他文献

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{{ truncateString('Stuart Tewksbury', 18)}}的其他基金

Integrated Interconnections for ULSI Using Silicon Wafer Area Networks (SWANs)
使用硅晶圆区域网络 (SWAN) 的 ULSI 集成互连
  • 批准号:
    9120378
  • 财政年份:
    1992
  • 资助金额:
    $ 23万
  • 项目类别:
    Standard Grant
Undergraduate Digital Design and Prototyping Laboratory
本科生数字设计与原型实验室
  • 批准号:
    9250758
  • 财政年份:
    1992
  • 资助金额:
    $ 23万
  • 项目类别:
    Standard Grant

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